Dietmar Tutsch

  • University of Wuppertal, Germany
  • TU Berlin, Institute of Computer Engineering and Microelectronics, Germany
  • International Computer Science Institute, Berkeley, USA

According to our database1, Dietmar Tutsch authored at least 35 papers between 1997 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


Online presence:



A New Concept for Multiplexers in Interconnect Blocks of FPGAs.
Proceedings of the IEEE International Conference on Consumer Electronics, 2021

An algorithm to optimise the energy distribution of data centre electrical infrastructures.
Int. J. Grid Util. Comput., 2020

Low-power Concepts for FPGAs in Applications with limited Energy Resources.
Proceedings of the 2020 International Symposium on Networks, Computers and Communications, 2020

Benefits of Low-Power Improvements at Circuit Level on Specific FPGA Architectures.
Proceedings of the 2020 IEEE International Conference on Consumer Electronics (ICCE), 2020

An Artificial Neural Network Approach to Forecast the Environmental Impact of Data Centers.
Inf., 2019

Autonomous Exploration, Mapping and Pathfinding using Sensor Fusion with a PhantomX MKIII.
Proceedings of the Echtzeit 2019 - Autonome Systeme, 2019

A System for User Centered Classification and Ranking of Points of Interest Using Data Mining in Geographical Data Sets.
Proceedings of the Advances in Artificial Intelligence, Software and Systems Engineering, 2019

Secure Real-time Communication.
Proceedings of the Echtzeit und Sicherheit, 2018

Logical PetriNet A Tool to Model Digital Circuit Petri Nets and Transform them into Digital Circuits.
Proceedings of the Measurement, Modelling and Evaluation of Computing Systems, 2018

A new approach to mapping software to coprocessor circuits.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Digital Circuit Petri Nets: A new Petri net type to describe and transform digital circuits for product safety engineering.
Proceedings of the IEEE 6th International Conference on Consumer Electronics - Berlin, 2016

A DTMC Model for Performance Evaluation of Irregular Interconnection Networks with Asymmetric Spatial Traffic Distributions.
Proceedings of the Analytical and Stochastic Modelling Techniques and Applications, 2016

A Criteria Transformation Approach to Pattern Matching based on Non-Linear Parameter Optimization.
J. Intell. Syst., 2015

Performance Increase by Software Decomposition with Characteristics of Combinational Logic.
Proceedings of the 10th International Conference on P2P, 2015

Estimating sustainability impact of high dependable data centers: a comparative study between Brazilian and US energy mixes.
Computing, 2013

RecMIN: A reconfiguration architecture for network on chip.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Models for dependability and sustainability analysis of data center cooling architectures.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2012

The modeling power of CINSim: Performance evaluation of interconnection networks.
Comput. Networks, 2009

Comparison of network-on-chip topologies for multicore systems considering multicast and local traffic.
Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, 2009

An Application-Optimized Network on Chip Platform.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009

Chip Multiprocessor Traffic Models Providing Consistent Multicast and Spatial Distributions.
Simul., 2008

Application-Layer Traffic Analysis of a Peer-to-Peer System.
IEEE Internet Comput., 2008

MLMIN: A multicore processor and parallel computer network topology for multicast.
Comput. Oper. Res., 2008

Lossless static vs. dynamic reconfiguration of interconnection networks in parallel and distributed computer systems.
Proceedings of the 2007 Summer Computer Simulation Conference, 2007

Quantile Estimation for Performance Measures in Network Simulations with CINSim.
Proceedings of the Fourth International Conference on the Quantitative Evaluaiton of Systems (QEST 2007), 2007

Formal Models for Multicast Traffic in Network on Chip Architectures with Compositional High-Level Petri Nets.
Proceedings of the Petri Nets and Other Models of Concurrency, 2007

Investigating dynamic reconfiguration of network architectures with CINSim.
Proceedings of the Proceedings 13th GI/ITG Conference on Measuring, 2006

Performance analysis of network architectures.
Springer, ISBN: 978-3-540-34308-0, 2006

Generating Systems of Equations for Performance Evaluation of Multistage Interconnection Networks.
J. Parallel Distributed Comput., 2002

Petri Net based Performance Evaluation of USAIA's Bandwidth Partitioning for the Wireless Cell Level.
Proceedings of the 9th International Workshop on Petri Nets and Performance Models, 2001

Multicast Performance of Multistage Interconnection Networks with Shared Buffering.
Proceedings of the Networking, 2001

Verfahren zur Leistungsbewertung von gepufferten mehrstufigen Verbindungsnetzwerken.
PhD thesis, 1998

Multicasting in Buffered Multistage Interconnection Networks: An Analytical Algorithm.
Proceedings of the 12<sup>th</sup> European Simulation Multiconference - Simulation, 1998

Performance Evaluation using Measure Dependent Transitions in Petri Nets.
Proceedings of the MASCOTS 1997, 1997

Performance of Buffered Multistage Interconnection Networks in Case of Packet Multicasting.
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997