Dipanjan Bhadra

According to our database1, Dipanjan Bhadra authored at least 2 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Design of a low power, relative timing based asynchronous MSP430 microprocessor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2013
A low power UART design based on asynchronous techniques.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013


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