Divyesh Sachan

Orcid: 0000-0002-7295-6672

According to our database1, Divyesh Sachan authored at least 7 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Design of Ultra-Low Power High-Q Single Ended Active Inductors for IF BPF of Receiver Frontend Using 130 nm BiCMOS Technology.
Wirel. Pers. Commun., 2021

2018
A 2.4 GHz Low Power Low Phase-Noise Enhanced FOM VCO for RF Applications Using 180 nm CMOS Technology.
Wirel. Pers. Commun., 2018

Analysis of modulation schemes for Bluetooth-LE module for Internet-of-Things (IoT) applications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2017
Fabrication of flexible sensors for electrodermal activity measurement.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
A Modified SRAM Based Low Power Memory Design.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Low power multi threshold 7T SRAM cell.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Universal biquadratic filter using Operational Floating Current Conveyor (OFCC).
Proceedings of the 28th International Conference on Microelectronics, 2016


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