Doru V. Nasui

According to our database1, Doru V. Nasui authored at least 7 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
Energy-aware scratch-pad memory partitioning for embedded systems.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Leakage-aware scratch-pad memory banking for embedded multidimensional signal processing.
Proceedings of the IEEE International Conference on Acoustics, 2014

2011
Signal Assignment Model for the Memory Management of Multidimensional Signal Processing Applications.
J. Signal Process. Syst., 2011

2010
Lattice-basedmemory allocation for data-intensive signal processing applications.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Energy-Aware Memory Allocation Framework for Embedded Data-Intensive Signal Processing Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Automatic generation of maps of memory accesses for energy-aware memory management.
Proceedings of the IEEE International Conference on Acoustics, 2009

System-level exploration tool for energy-aware memory management in the design of multidimensional signal processing systems.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009


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