Florin Balasa

According to our database1, Florin Balasa authored at least 52 papers between 1993 and 2017.

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Bibliography

2017
Energy-aware memory management for embedded multidimensional signal processing applications.
EURASIP J. Embed. Syst., 2017

WIP: Optimization algorithms: A key component of EDA education.
Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017

2016
Parallel algorithm mapping to memory multidimensional signals.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

System-level exploration of hierarchical storage organizations for embedded data-intensive applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Scratch-pad memory banking by dynamic programming for embedded data-intensive applications.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Optimization of memory banking in embedded multidimensional signal processing applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Multithreaded Signal-to-Memory Mapping Algorithm for Embedded Multidimensional Signal Processing.
Proceedings of the 20th International Conference on Control Systems and Computer Science, 2015

2014
Energy-aware scratch-pad memory partitioning for embedded systems.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Leakage-aware scratch-pad memory banking for embedded multidimensional signal processing.
Proceedings of the IEEE International Conference on Acoustics, 2014

2013
Design space exploration for low-power memory systems in embedded signal processing applications.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

Scratch-pad memory banking for energy reduction in embedded signal processing systems.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Compiler-directed memory hierarchy design for low-energy embedded systems.
Proceedings of the 11th ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2013

2011
Signal Assignment Model for the Memory Management of Multidimensional Signal Processing Applications.
J. Signal Process. Syst., 2011

2010
Lattice-basedmemory allocation for data-intensive signal processing applications.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Signal Assignment to Hierarchical Memory Organizations for Embedded Multidimensional Signal Processing Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Energy-Aware Memory Allocation Framework for Embedded Data-Intensive Signal Processing Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Automatic generation of maps of memory accesses for energy-aware memory management.
Proceedings of the IEEE International Conference on Acoustics, 2009

Analog layout synthesis - Recent advances in topological approaches.
Proceedings of the Design, Automation and Test in Europe, 2009

System-level exploration tool for energy-aware memory management in the design of multidimensional signal processing systems.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications.
J. Signal Process. Syst., 2008

Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Computation of the minimum data storage and applications in memory management for multimedia signal processing.
Integr. Comput. Aided Eng., 2008

Efficient assignment algorithm for mapping multidimensional signals into the physical memory.
Proceedings of the IEEE International Conference on Acoustics, 2008

2007
Computation of Storage Requirements for Multi-Dimensional Signal Processing Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Mapping model with inter-array memory sharing for multidimensional signal processing.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Computation of the Minimum Data Storage for Multi-Dimensional Signal Processing.
Proceedings of the IEEE International Conference on Acoustics, 2007

Mapping multi-dimensional signals into hierarchical memory organizations.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Signal-to-Memory Mapping Analysis for Multimedia Signal Processing.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Memory Size Computation for Real-Time Multimedia Applications Based on Polyhedral Decomposition.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Formal model of data reuse analysis for hierarchical memory organizations.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Memory size computation for multimedia processing applications.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Loop Transformation Methodologies for Array-Oriented Memory Management.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2004
On the exploration of the solution space in analog placement with symmetry constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Algebraic techniques in the memory size computation of multimedia processing applications.
Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004

2003
Red-Black Interval Trees in Device-Level Analog Placement.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

Placement with symmetry constraints for analog layout using red-black trees.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Using red-black interval trees in device-level analog placement with symmetry constraints.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Efficient solution space exploration based on segment trees in analog placement with symmetry constraints.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
Solving large scale assignment problems in high-level synthesis by approximative quadratic programming.
Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

Device-level placement for analog layout: an opportunity for non-slicing topological representations.
Proceedings of ASP-DAC 2001, 2001

2000
Symmetry within the sequence-pair representation in the context ofplacement for analog design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Modeling Non-Slicing Floorplans with Binary Trees.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Block placement with symmetry constraints based on the O-tree non-slicing representation.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Module Placement for Analog Layout Using the Sequence-Pair Representation.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Memory size estimation for multimedia applications.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

1997
Practical solutions for counting scalars and dependences in ATOMIUM-a memory management system for multidimensional signal processing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1995
Background memory area estimation for multidimensional signal processing systems.
IEEE Trans. Very Large Scale Integr. Syst., 1995

1994
Transformation of Nested Loops with Modulo Indexing to Affine Recurrences.
Parallel Process. Lett., 1994

Dataflow-driven memory allocation for multi-dimensional signal processing systems.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Modeling multidimensional data and control flow.
IEEE Trans. Very Large Scale Integr. Syst., 1993

Exact evaluation of memory size for multi-dimensional signal processing systems.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993


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