Edward Hrynkiewicz

According to our database1, Edward Hrynkiewicz authored at least 19 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Nonlinearity Measurement of a Voltage Ramp Using a Digital Technique.
J. Circuits Syst. Comput., 2017

2016
Implementation of a microcontroller-based simplified FITA-FIS model.
Microprocess. Microsystems, 2016

About some peculiar approaches to seeking the Ashenhurst decomposition of logic functions in the Reed-Muller spectrum domain.
Proceedings of the 2016 MIXDES, 2016

2015
Popular microcontrollers execute IEC 61131-3 standard operators and functional blocks in simply automatic control tasks.
Proceedings of the 20th International Conference on Methods and Models in Automation and Robotics, 2015

2014
Seeking for decomposition of a Boolean function in the reed-müller spectral domain by Means of permutation between function variables.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Industrial Implementation of Failure Detection Algorithm in Communication System.
Proceedings of the Computer Networks - 21st International Conference, 2014

2013
Decomposition of the fuzzy inference system for implementation in the FPGA structure.
Int. J. Appl. Math. Comput. Sci., 2013

About Implementation of IEC 61131-3 IL Operators in Standard Microcontrollers.
Proceedings of the 12th IFAC Conference on Programmable Devices and Embedded Systems, 2013

Area-speed efficient modular architecture for GF(2<sup>m</sup>) multipliers dedicated for cryptographic applications.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012
Analysis of GF (2233) multipliers regarding elliptic curve cryptosystem applications.
Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

The dynamic properties investigation of the PLC CPU implemented in FPGA.
Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

2011
Decomposition of multi-output logic function in Reed-Muller spectral domain.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Multiplication in GF(2m): Area and time dependency/efficiency/complexity analysis.
Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

A FPGA-based bit-word PLC CPUs development platform.
Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

Non-disjoint decomposition of logic functions in Reed-Muller spectral domain.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
An idea of event-driven program tasks execution.
Proceedings of the 9th IFAC Workshop on Programmable Devices and Embedded Systems, 2009

An utilisation of Boolean differential calculus in variables partition calculation for decomposition of logic functions.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2007
Decomposition of Logic Functions in Reed-Muller Spectral Domain.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

A Web Services based Approach for System on a Chip Design Planning.
Proceedings of the Coordination of Collaborative Engineering, 2007


  Loading...