Ehsan Pakbaznia
According to our database1,
Ehsan Pakbaznia
authored at least 11 papers
between 2006 and 2012.
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Bibliography
2012
Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating.
IEEE Trans. Very Large Scale Integr. Syst., 2012
2010
Minimizing the power consumption of a Chip Multiprocessor under an average throughput constraint.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Minimizing energy consumption of a chip multiprocessor through simultaneous core consolidation and DVFS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Probabilistic error propagation in logic circuits using the Boolean difference calculus.
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
2006
Proceedings of the 43rd Design Automation Conference, 2006