Evangelos Vassalos

According to our database, Evangelos Vassalos authored at least 14 papers between 2009 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Deep Learning Inference with Dynamic Graphs on Heterogeneous Platforms.

Vasileios K. Pothos, Evangelos Vassalos, Ilias Theodorakopoulos, Nikolaos Fragoulis

Int. J. Parallel Program., 2021

2019

Dynamic Pruning of CNN networks.

Nikolaos Fragoulis, Ilias Theodorakopoulos, Vasileios K. Pothos, Evangelos Vassalos

Proceedings of the 10th International Conference on Information, 2019

2013

RNS assisted image filtering and edge detection.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the 18th International Conference on Digital Signal Processing, 2013

On the design of modulo 2ⁿ-1 cubing units.

Evangelos Vassalos, Dimitris Bakalis

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Reverse converters for RNSs with diminished-one encoded channels.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of Eurocon 2013, 2013

Modulo 2ⁿ-2 arithmetic units.

Evangelos Vassalos, Dimitris Bakalis

Proceedings of Eurocon 2013, 2013

2012

CSD-RNS-based Single Constant Multipliers.

Evangelos Vassalos, Dimitris Bakalis

J. Signal Process. Syst., 2012

SUT-RNS Residue-to-Binary Converters Design.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011

On the Design of Modulo 2ⁿ±1 Subtractors and Adders/Subtractors.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Circuits Syst. Signal Process., 2011

On the use of double-LSB and signed-LSB encodings for RNS.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the 17th International Conference on Digital Signal Processing, 2011

Modulo 2^n+1 Arithmetic Units with Embedded Diminished-to-Normal Conversion.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

SUT-RNS Forward and Reverse Converters.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009

Novel modulo 2n+1 subtractors.

Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos

Proceedings of the 16th International Conference on Digital Signal Processing, 2009

Combined SD-RNS Constant Multiplication.

Evangelos Vassalos, Dimitris Bakalis

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009