Faisal A. Musa

According to our database, Faisal A. Musa authored at least 6 papers between 2003 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

A 5-Gbit/s CMOS Optical Receiver With Integrated Spatially Modulated Light Detector and Equalization.

Tony Shuo-Chun Kao, Faisal A. Musa, Anthony Chan Carusone

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

A 32/16-Gb/s Dual-Mode Pulsewidth Modulation Pre-Emphasis (PWM-PE) Transmitter With 30-dB Loss Compensation Using a High-Speed CML Design Methodology.

Anthony Chan Carusone, Horace Cheng, Faisal A. Musa

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008

A passive filter aided timing recovery scheme.

Faisal A. Musa, Anthony Chan Carusone

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Modeling and Design of Multilevel Bang-Bang CDRs in the Presence of ISI and Noise.

Faisal A. Musa, Anthony Chan Carusone

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2006

A Baud-Rate Timing Recovery Scheme With a Dual-Function Analog Filter.

Faisal A. Musa, Anthony Chan Carusone

IEEE Trans. Circuits Syst. II Express Briefs, 2006

2003

Clock recovery in high-speed multilevel serial links.

Faisal A. Musa, Anthony Chan Carusone

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003