Fayez El Guibaly

According to our database1, Fayez El Guibaly authored at least 15 papers between 1988 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2001
Adapting Tomasulo's algorithm for bytecode folding based Java processors.
SIGARCH Computer Architecture News, 2001

1998
Modeling of Shift Register-based ATM Switch.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

The NAVL Distributed Virtual Reality System.
Proceedings of the Advanced Multimedia Content Processing, First International Conference, 1998

1997
New Realization and Implementation of Fixed-Point IIR Digital Filters.
Journal of Circuits, Systems, and Computers, 1997

1996
Design of low-delay two-channel FIR filter banks using constrained optimization.
Signal Processing, 1996

Mapping 3-D IIR digital filter onto systolic arrays.
Multidim. Syst. Sign. Process., 1996

1995
New low roundoff noise realizations of second-order digital filter sections.
IEEE Trans. Signal Processing, 1995

Efficient decimator and interpolator Array Structures.
Journal of Circuits, Systems, and Computers, 1995

New IIR Digital Filter Realizations Using Residue-Feedback.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Design of Low-Delay Perfect-Reconstruction FIR Filter Banks for Tree-Structured Subband Coders.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
VLSI Array Processors Implementation of Block-State IIR Digital Filtentrs.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Design of Novel Serial-Parallel Inner-Product Processors.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1992
Systolic implementation of digital filters.
Multidim. Syst. Sign. Process., 1992

1989
VLSI design of an FFT processor network.
Integr., 1989

1988
A Multiple-Access Pipeline Architecture for Digital Signal Processing.
IEEE Trans. Computers, 1988


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