Florian Hirner

Orcid: 0009-0006-5778-2447

According to our database1, Florian Hirner authored at least 9 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Chiplet-Based Techniques for Scalable and Memory-Aware Multi-Scalar Multiplication.
IACR Cryptol. ePrint Arch., 2025

2024
Proteus: A Pipelined NTT Architecture Generator.
IEEE Trans. Very Large Scale Integr. Syst., July, 2024

Exploring Large Integer Multiplication for Cryptography Targeting In-Memory Computing.
IACR Cryptol. ePrint Arch., 2024

OpenNTT: An Automated Toolchain for Compiling High-Performance NTT Accelerators in FHE.
IACR Cryptol. ePrint Arch., 2024

Orion's Ascent: Accelerating Hash-Based Zero Knowledge Proof on Hardware Platforms.
IACR Cryptol. ePrint Arch., 2024

Whipping the Multivariate-based MAYO Signature Scheme using Hardware Platforms.
Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security, 2024

2023
Aloha-HE: A Low-Area Hardware Accelerator for Client-Side Operations in Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2023

A Hardware Implementation of MAYO Signature Scheme.
IACR Cryptol. ePrint Arch., 2023

PROTEUS: A Tool to generate pipelined Number Theoretic Transform Architectures for FHE and ZKP applications.
IACR Cryptol. ePrint Arch., 2023


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