According to our database1, Florian Huemer authored at least 8 papers between 2015 and 2018.
Legend:Book In proceedings Article PhD thesis Other
Refined metastability characterization using a time-to-digital converter.
Microelectronics Reliability, 2018
State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018
Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
Partially Systematic Constant-Weight Codes for Delay-Insensitive Communication.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018
Measuring metastability using a time-to-digital converter.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
Fault-Tolerant Clock Synchronization with High Precision.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
A new coding scheme for fault tolerant 4-phase delay-insensitive codes.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Methods for analysing and improving the fault resilience of delay-insensitive codes.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015