Florian Huemer

According to our database, Florian Huemer authored at least 14 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

ζ: A Novel Approach for Mitigating Single Event Transient Effects in Quasi Delay Insensitive Logic.

Zaheer Tabassam, Andreas Steininger, Robert Najvirt, Florian Huemer

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

2022

On SAT-Based Model Checking of Speed-Independent Circuits.

Florian Huemer, Robert Najvirt, Andreas Steininger

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

2021

An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits.

Patrick Behal, Florian Huemer, Robert Najvirt, Andreas Steininger

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Towards Explaining the Fault Sensitivity of Different QDI Pipeline Styles.

Patrick Behal, Florian Huemer, Robert Najvirt, Andreas Steininger, Zaheer Tabassam

Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

2020

Timing Domain Crossing using Muller Pipelines.

Florian Huemer, Andreas Steininger

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2019

An Experimental Study of Metastability-Induced Glitching Behavior.

Thomas Polzer, Florian Huemer, Andreas Steininger

J. Circuits Syst. Comput., 2019

2018

Refined metastability characterization using a time-to-digital converter.

Thomas Polzer, Florian Huemer, Andreas Steininger

Microelectron. Reliab., 2018

State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration.

Markus Schütz, Andreas Steininger, Florian Huemer, Jakob Lechner

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA.

Florian Huemer, Thomas Polzer, Andreas Steininger

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Partially Systematic Constant-Weight Codes for Delay-Insensitive Communication.

Florian Huemer, Andreas Steininger

Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

2017

Measuring metastability using a time-to-digital converter.

Thomas Polzer, Florian Huemer, Andreas Steininger

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

Fault-Tolerant Clock Synchronization with High Precision.

Attila Kinali, Florian Huemer, Christoph Lenzen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

A new coding scheme for fault tolerant 4-phase delay-insensitive codes.

Florian Huemer, Jakob Lechner, Andreas Steininger

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015

Methods for analysing and improving the fault resilience of delay-insensitive codes.

Jakob Lechner, Andreas Steininger, Florian Huemer

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015