Francisco José Ballester-Merelo

Orcid: 0000-0002-2464-5116

According to our database1, Francisco José Ballester-Merelo authored at least 11 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
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PhD thesis 
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Links

Online presence:

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Bibliography

2021
Design, Implementation, and Configuration of Laser Systems for Vehicle Detection and Classification in Real Time.
Sensors, 2021

The Event Detection System in the NEXT-White Detector.
Sensors, 2021

2018
Real-Time Early Warning System Design for Pluvial Flash Floods - A Review.
Sensors, 2018

2008
Integer-pixel motion estimation H.264/AVC accelerator architecture with optimal memory management.
Microprocess. Microsystems, 2008

2004
Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices.
Microprocess. Microsystems, 2004

2D-DCT on FPGA by polynomial transformation in two-dimensions.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Architectures for ICT on FPGA.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

FPGA Custom DSP for ECG Signal Analysis and Compression.
Proceedings of the Field Programmable Logic and Application, 2004

2003
A new inverse discrete wavelet packet transform architecture.
Proceedings of the Seventh International Symposium on Signal Processing and Its Applications, 2003

Fully Parameterized Discrete Wavelet Packet Transform Architecture Oriented to FPGA.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2000
Artificial Neural Network Implementation on a Single FPGA of a Pipelined On-Line Backpropagation.
Proceedings of the 13th International Symposium on System Synthesis, 2000


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