Rafael Gadea Gironés

According to our database, Rafael Gadea Gironés authored at least 28 papers between 1999 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Task parallelism-based architectures on FPGA to optimize the energy efficiency of AI at the edge.

Rafael Gadea Gironés, Jorge D. Fe, José María Monzó

Microprocess. Microsystems, April, 2023

2018

Optimization of Deep Neural Networks Using SoCs with OpenCL.

Rafael Gadea Gironés, Ricardo José Colom-Palero, Vicente Herrero-Bosch

Sensors, 2018

2015

Evolutionary optimization of neural networks with heterogeneous computation: study and implementation.

Jorge D. Fe, Ramón José Aliaga, Rafael Gadea Gironés

J. Supercomput., 2015

2013

Experimental Platform for Accelerate the Training of ANNs with Genetic Algorithm and Embedded System on FPGA.

Jorge D. Fe, Ramón José Aliaga, Rafael Gadea Gironés

Proceedings of the Natural and Artificial Computation in Engineering and Medical Applications, 2013

2011

Octree-based, GPU implementation of a continuous cellular automaton for the simulation of complex, evolving surfaces.

Néstor Ferrando, M. A. Gosálvez, Joaquín Cerdá, Rafael Gadea Gironés, Kazuo Sato

Comput. Phys. Commun., 2011

2010

Approximate k-NN delta test minimization method using genetic algorithms: Application to time series.

Fernando Mateo, Dusan Sovilj, Rafael Gadea Gironés

Neurocomputing, 2010

2009

A 2D Positioning Application in PET Using ANNs.

Fernando Mateo, Ramón José Aliaga, Jorge Daniel Martínez, José María Monzó, Rafael Gadea Gironés

Proceedings of the Encyclopedia of Artificial Intelligence (3 Volumes), 2009

A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA.

Ramón José Aliaga, Rafael Gadea Gironés, Ricardo José Colom-Palero, Joaquín Cerdá, Néstor Ferrando, Vicente Herrero-Bosch

Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

RCGA-S/RCGA-SP Methods to Minimize the Delta Test for Regression Tasks.

Fernando Mateo, Dusan Sovilj, Rafael Gadea Gironés, Amaury Lendasse

Proceedings of the Bio-Inspired Systems: Computational and Ambient Intelligence, 2009

2008

A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding.

Agustín Ramírez-Agundis, Rafael Gadea Gironés, Ricardo José Colom-Palero

Microprocess. Microsystems, 2008

A Mixed Hardware/Software SOFM Training System.

Agustín Ramírez-Agundis, Rafael Gadea Gironés, Ricardo José Colom-Palero, Javier Díaz-Carmona

Computación y Sistemas, 2008

SoC-Based Implementation of the Backpropagation Algorithm for MLP.

Ramón José Aliaga, Rafael Gadea Gironés, Ricardo José Colom-Palero, José María Monzó, Christoph W. Lerche, Jorge Daniel Martínez, Angel Sebastiá, Fernando Mateo

Proceedings of the 8th International Conference on Hybrid Intelligent Systems (HIS 2008), 2008

2007

A wavelet-VQ system for real-time video compression.

Agustín Ramírez-Agundis, Rafael Gadea Gironés, Ricardo José Colom-Palero, Javier Díaz-Carmona

J. Real Time Image Process., 2007

Incidence Position Estimation in a PET Detector Using a Discretized Positioning Circuit and Neural Networks.

Fernando Mateo, Ramón José Aliaga, Jorge Daniel Martínez, José María Monzó, Rafael Gadea Gironés

Proceedings of the Computational and Ambient Intelligence, 2007

2006

A Novel FPGA Architecture of a 2-D Wavelet Transform.

Ricardo José Colom-Palero, Rafael Gadea Gironés, Angel Sebastià-Cortés

J. VLSI Signal Process., 2006

An active methodology for teaching electronic systems design.

Joaquín Cerdá-Boluda, Marcos Martínez Peiró, Miguel A. Larrea Torres, Rafael Gadea Gironés, Ricardo José Colom-Palero

IEEE Trans. Educ., 2006

2005

FPGA Implementation of a Pipelined On-Line Backpropagation.

Rafael Gadea Gironés, Ricardo José Colom-Palero, Joaquín Cerdá-Boluda, Angel Sebastià-Cortés

J. VLSI Signal Process., 2005

A Tool for Implementing and Exploring SBM Models: Universal 1D Invertible Cellular Automata.

Joaquín Cerdá, Rafael Gadea Gironés, Jorge Daniel Martínez, Angel Sebastiá

Proceedings of the Mechanisms, 2005

2004

Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices.

Ricardo José Colom-Palero, Rafael Gadea Gironés, Francisco José Ballester-Merelo, Marcos Martínez Peiró

Microprocess. Microsystems, 2004

FPGA Implementations of the RNR Cellular Automata to Model Electrostatic Field.

Joaquín Cerdá-Boluda, Oscar Amoraga-Lechiguero, Ruben Torres-Curado, Rafael Gadea Gironés, Angel Sebastià-Cortés

Proceedings of the High Performance Computing for Computational Science, 2004

FPGA Custom DSP for ECG Signal Analysis and Compression.

Marcos Martínez Peiró, Francisco José Ballester-Merelo, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer

Proceedings of the Field Programmable Logic and Application, 2004

2003

Implementing a Margolus Neighborhood Cellular Automata on a FPGA.

Joaquín Cerdá, Rafael Gadea Gironés, Guillermo Payá Vayá

Proceedings of the Artificial Neural Nets Problem Solving Methods, 2003

FPGA Implementation of Adaptive Non-linear Predictors for Video Compression.

Rafael Gadea Gironés, Agustín Ramírez-Agundis, Joaquín Cerdá-Boluda, Ricardo José Colom-Palero

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

On the Implementation of a Margolus Neighborhood Cellular Automata on FPGA.

Joaquín Cerdá, Rafael Gadea Gironés, Vicente Herrero-Bosch, Angel Sebastiá

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2000

Artificial Neural Network Implementation on a Single FPGA of a Pipelined On-Line Backpropagation.

Rafael Gadea Gironés, Joaquín Cerdá, Francisco José Ballester-Merelo, Antonio Mocholí Salcedo

Proceedings of the 13th International Symposium on System Synthesis, 2000

The Role of the Embedded Memories in the Implementation of Artificial Neural Networks.

Rafael Gadea Gironés, Vicente Herrero-Bosch, Angel Sebastiá, Antonio Mocholí Salcedo

Proceedings of the Field-Programmable Logic and Applications, 2000

1999

Forward-Backward Parallelism in On-Line Backpropagation.

Rafael Gadea Gironés, Antonio Mocholí Salcedo

Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

Implementation with FPGAs of a pipelined on-line backpropagation.

Rafael Gadea Gironés, Antonio Mocholí Salcedo

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999