Francisco Colodro Ruiz

Orcid: 0000-0001-6108-6117

According to our database1, Francisco Colodro Ruiz authored at least 35 papers between 1993 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Emergency Locator Transmitters in the Era of More Electric Aircraft: A Comprehensive Review of Energy, Integration and Safety Challenges.
CoRR, March, 2026

Region-Based Algorithm for Switching Frequency Reduction in Predictive Control of Converter Supplied Electric Drives.
Algorithms, 2026

2025
Weighting Factors Tuning by Direct Feedback in Predictive Control of Multiphase Motors.
CoRR, October, 2025

2024
Digital-to-analog converters based on Time-Interleaved Sigma-Delta Modulation with Analog Multiplexing.
Proceedings of the 39th Conference on Design of Circuits and Integrated Systems, 2024

2023
On-Site Calibration of an Electric Drive: A Case Study Using a Multiphase System.
Sensors, September, 2023

Time-Interleaving Sigma-Delta Modulator-Based Digital-to-Analog Converter With Time Multiplexing in the Analog Domain.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

2021
Time-interleaving design of error-feedback sigma-delta modulators with infinite impulse response noise transfer function.
IET Circuits Devices Syst., 2021

2020
Development of GaN Technology-Based DC/DC Converter for Hybrid UAV.
IEEE Access, 2020

2014
Linearity Enhancement of VCO-Based Quantizers for SD Modulators by Means of a Tracking Loop.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2013
Frequency-to-digital conversion based on a sampled Phase-Locked Loop.
Microelectron. J., 2013

2010
Spectral Analysis of Pulsewidth-Modulated Sampled Signals.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Continuous-Time Sigma-Delta Modulator With a Fast Tracking Quantizer and Reduced Number of Comparators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Impact of finite impulse response digital-toanalogue converter delay on the stability of continuous-time sigma-delta modulators with pulse-with modulation in the feedback path.
IET Circuits Devices Syst., 2010

Pulse-width modulation in sigma-delta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
An Analog Squaring Technique Based on Asynchronous Sigma-Delta Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

New Continuous-Time Multibit Sigma-Delta Modulators With Low Sensitivity to Clock Jitter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
Continuous-Time Sigma-Delta Modulator With an Embedded Pulsewidth Modulation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Multibit CT SD modulators with pulse width modulation and FIR-DAC in the feedback path.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2005
Time-interleaved multirate sigma-delta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
New multirate bandpass sigma-delta modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Digital noise-shaping of residues in dual-quantization sigma-delta modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A multirate based band-pass sigma-delta modulator.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
New dual-quantization multibit sigma-delta modulators with digital noise-shaping.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2001
Multirate-cascade sigma-delta (MC-SD) modulators.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Improved multirate sigma-delta architecture.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Multirate-multibit sigma-delta modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1998
ASITRON: ASIC for vectorial control of induction motors and speed regulation using fuzzy-logic.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997
A Fully Stochastic Fuzzy Logic Controller.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997

A Hardware Implementation of CNNs Based on Pulse Stream Techniques.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997

AFAN, a Tool for the Automatic Design of Fuzzy and Neural Controllers.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997

1995
Two digital circuits for a fully parallel stochastic neural network.
IEEE Trans. Neural Networks, 1995

A Mixed Parallel-Sequential SHNN for Large Networks.
Proceedings of the From Natural to Artificial Neural Computation, 1995

A Circuit for Learning in Fuzzy Logic-Based Controllers.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A Digital Fuzzy-Logic Controller with a Simple Architecture.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Towards a fully parallel stochastic Hopfield neural network.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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