George Jie Yuan

Affiliations:
  • Hong Kong University of Science and Technology


According to our database1, George Jie Yuan authored at least 32 papers between 2004 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
CMOS-Compatible Time-of-Flight 3D Imaging Sensors and Systems.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2015
A 75 dB SNDR 10-MHz Signal Bandwidth Gm-C-Based Sigma-Delta Modulator With a Nonlinear Feedback Compensation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A 1/2.5 inch VGA 400 fps CMOS Image Sensor With High Sensitivity for Machine Vision.
IEEE J. Solid State Circuits, 2014

2013
A 10-MHz bandwidth 70-dB SNDR 640MS/s continuous-time ΣΔ ADC using Gm-C filter with nonlinear feedback DAC calibration.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
An Interpolation-Based Calibration Architecture for Pipeline ADC With Nonlinear Error.
IEEE Trans. Instrum. Meas., 2012

A 12-bit 20 MS/s 56.3 mW Pipelined ADC With Interpolation-Based Nonlinear Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A Quantum-Limited Highly Linear Monolithic CMOS Detector for Computed Tomography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Equation Environment Coupling and Interference on the Electric-Field Intrabody Communication Channel.
IEEE Trans. Biomed. Eng., 2012

Modeling of the Cell-Electrode Interface Noise for Microelectrode Arrays.
IEEE Trans. Biomed. Circuits Syst., 2012

A 1500 fps Highly Sensitive 256 , ˟, 256 CMOS Imaging Sensor With In-Pixel Calibration.
IEEE J. Solid State Circuits, 2012

Digitally Calibrated 768-kS/s 10-b Minimum-Size SAR ADC Array With Dithering.
IEEE J. Solid State Circuits, 2012

32.9 nV/rt Hz - 60.6 dB THD Dual-Band Micro-Electrode Array Signal Acquisition IC.
IEEE J. Solid State Circuits, 2012

A physical layer security analysis on the electric-field intra-body communication.
Proceedings of the International Conference on Computing, Networking and Communications, 2012

2011
Electric-Field Intrabody Communication Channel Modeling With Finite-Element Method.
IEEE Trans. Biomed. Eng., 2011

Highly Accurate Dual-Band Cellular Field Potential Acquisition For Brain-Machine Interface.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

A 38.6nV/Hz<sup>0.5</sup> -59.6dB THD dual-band micro-electrode array signal acquisition IC.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
The design and optimization methodology of a low-distortion sub-µW sample-and-hold stage for weak bio-currents.
Microelectron. J., 2010

Power analysis and design of wide dynamic range CMOS imaging sensors.
Microelectron. J., 2010

A highly linear wide dynamic range detector for cell recording with microelectrode arrays.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

2009
Modeling, Quantitative Analysis, and Design of Switched-Current Pipeline A/D Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

An Activity-Triggered 95.3 dB DR -75.6 dB THD CMOS Imaging Sensor With Digital Calibration.
IEEE J. Solid State Circuits, 2009

A Wide Dynamic Range High Linearity In-pixel Data Acquisition Front-end for Computed Tomography.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Low-noise Monolithic CMOS Bio-potential Detector.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Background Calibration With Piecewise Linearized Error Model for CMOS Pipeline A/D Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A low-distortion and wide dynamic range CMOS imager for wireless capsule endoscopy.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

The Design and Optimization of a 25 kS/s 10 bit Micropower Current S/H Cell for Weak Current Bio-medical Applications.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007
Cort-X II: The Low-Power Element Design for a Dynamic Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Cort-X II: low power element design of a large-scale spatio-temporal pattern clustering system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A CMOS monolithic implementation of a nonlinear interconnection module for a corticonic network.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CMOS monolithic implementation of a nonlinear element for arbitrary 1D map generation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
GBOPCAD: A Synthesis Tool for High-Performance Gain-Boosted Opamp Design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2004
A compensation-based optimization methodology for gain-boosted opamp.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


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