Gerard Páez-Monzón

According to our database, Gerard Páez-Monzón authored at least 3 papers between 1996 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1999

The design of a SRAM-based field-programmable gate array-Part II: Circuit design and layout.

Paul Chow, Soon Ong Seo, Jonathan Rose, Kevin Chung, Gerard Páez-Monzón, Immanuel Rahardja

IEEE Trans. Very Large Scale Integr. Syst., 1999

The design of an SRAM-based field-programmable gate array. I. Architecture.

Paul Chow, Soon Ong Seo, Jonathan Rose, Kevin Chung, Gerard Páez-Monzón, Immanuel Rahardja

IEEE Trans. Very Large Scale Integr. Syst., 1999

1996

The RISC processor DMN-6: a unified data-control flow architecture.

Gerard Páez-Monzón, Charles Páez-Monzón

SIGARCH Comput. Archit. News, 1996