Grzegorz Blakiewicz

According to our database, Grzegorz Blakiewicz authored at least 18 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Single-Slope ADC With Embedded Convolution Filter for Global-Shutter CMOS Image Sensors.

Miron Klosowski, Yichuang Sun, Waldemar Jendernalik, Grzegorz Blakiewicz, Jacek Jakusz, Stanislaw Szczepanski

IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

2020

Low-Power Receivers for Wireless Capacitive Coupling Transmission in 3-D-Integrated Massively Parallel CMOS Imager.

Grzegorz Blakiewicz, Miron Klosowski, Waldemar Jendernalik, Jacek Jakusz, Stanislaw Szczepanski

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces.

Jacek Jakusz, Waldemar Jendernalik, Grzegorz Blakiewicz, Miron Klosowski, Stanislaw Szczepanski

Sensors, 2020

Light-Powered Starter for Micro-Power Boost DC-DC Converter for CMOS Image Sensors.

Grzegorz Blakiewicz, Jacek Jakusz, Miron Klosowski, Waldemar Jendernalik, Stanislaw Szczepanski

Circuits Syst. Signal Process., 2020

2018

A High-Efficient Measurement System With Optimization Feature for Prototype CMOS Image Sensors.

Miron Klosowski, Jacek Jakusz, Waldemar Jendernalik, Grzegorz Blakiewicz, Stanislaw Szczepanski, Slawomir Koziel

IEEE Trans. Instrum. Meas., 2018

2017

A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array.

Miron Klosowski, Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Stanislaw Szczepanski

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2015

A 0.5 V bulk-driven voltage follower/DC level shifter and its application in class AB output stage.

Tomasz Kulej, Grzegorz Blakiewicz

Int. J. Circuit Theory Appl., 2015

2013

An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing.

Waldemar Jendernalik, Grzegorz Blakiewicz, Jacek Jakusz, Stanislaw Szczepanski, Robert Piotrowski

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2011

Output-capacitorless low-dropout regulator using a cascoded flipped voltage follower.

Grzegorz Blakiewicz

IET Circuits Devices Syst., 2011

Analog CMOS processor for early vision processing with highly reduced power consumption.

Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Robert Piotrowski, Stanislaw Szczepanski

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010

Frequency compensation for two-stage operational amplifiers with improved power supply rejection ratio characteristic.

Grzegorz Blakiewicz

IET Circuits Devices Syst., 2010

2008

Optimization of active circuits for substrate noise suppression.

Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Supply current spectrum estimation of digital cores at early design.

Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske

IET Circuits Devices Syst., 2007

2006

Estimation of supply current spectrum for early noise evaluation.

Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Modeling of substrate noise block properties for early prediction.

Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Substrate noise modeling in early floorplanning of MS-SOCs.

Grzegorz Blakiewicz, Marcin Jeske, Malgorzata Chrzanowska-Jeske, Jin S. Zhang

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Substrate noise optimization in early floorplanning for mixed signal SOCs.

Grzegorz Blakiewicz, Marcin Jeske, Malgorzata Chrzanowska-Jeske

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Substrate noise-aware floorplanning for mixed-signal SOCs.

Marcin Jeske, Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske, Benyi Wang

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004