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Han Yan

Orcid: 0009-0004-6738-8510

Affiliations:
  • Southeast University, School of Integrated Circuits, Nanjing, China


According to our database1, Han Yan authored at least 3 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2025
PF²A-ViT: Parameter-Free and Feature-Aware Dynamic Token Pruning Accelerator With Complementary Quantization-Encoding for Vision Transformer.
[BibTeX]
[DOI]
Zihan Zou
,
Xinming Yan
,
Chen Zhang
,
Shikuang Chen
,
Guang Yang
,
Han Yan
,
Hao Cai
,
Bo Liu
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2025

2024
Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy.
[BibTeX]
[DOI]
Bo Liu
,
Xinxiang Huang
,
Yang Zhang
,
Guang Yang
,
Han Yan
,
Chen Zhang
,
Zejv Li
,
Yuanhao Wang
,
Hao Cai
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024

An Index-free Coding Compression Mechanism for Vision Transformers.
[BibTeX]
[DOI]
Han Yan
,
Zihan Zou
,
Shikuang Chen
,
Chen Zhang
,
Guang Yang
,
Hao Cai
,
Bo Liu
Proceedings of the IEEE International Conference on Integrated Circuits, 2024


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