Hao Shen

Affiliations:
  • EVE, Software Engineering Department, Paris, France
  • TIMA Laboratory, System Level Synthesis Group, Grenoble, France
  • Grenoble University, Grenoble, France


According to our database1, Hao Shen authored at least 8 papers between 2007 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Native Simulation of MPSoC Using Hardware-Assisted Virtualization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2011
On MPSoC Software Execution at the Transaction Level.
IEEE Des. Test Comput., 2011

Using Amdahl's Law for Performance Analysis of Many-Core SoC Architectures Based on Functionally Asymmetric Processors.
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011

2010
A flexible hybrid simulation platform targeting multiple configurable processors SoC.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Novel task migration framework on configurable heterogeneous MPSoC platforms.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
MPSoC Communication Architecture Exploration Using an Abstraction Refinement Method.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Configurable Heterogeneous MPSoC Architecture Exploration Using Abstraction Levels.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008

2007
Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007


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