Nicolas Fournel

According to our database1, Nicolas Fournel authored at least 22 papers between 2007 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms.
J. Syst. Archit., 2016

Deterministic reversible MPSoC debugger based on virtual platform execution traces.
Des. Autom. Embed. Syst., 2016

2015
Simulation native basée sur le support matériel à la virtualisation cas des systèmes many-cœurs spécifiques.
Tech. Sci. Informatiques, 2015

Collecting traces in dynamic binary translation based virtual prototyping platforms.
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015

Integrating Task Migration Capability in Software Tool-Chain for Data-Flow Applications Mapped on Multi-tiled Architectures.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Fast and accurate branch predictor simulation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Transparent and portable agent based task migration for data-flow applications on multi-tiled architectures.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014
Lightweight task migration in embedded multi-tiled architectures using task code replication.
Proceedings of the 25nd IEEE International Symposium on Rapid System Prototyping, 2014

EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

2013
Automated generation of efficient instruction decoders for instruction set simulators.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Native simulation of complex VLIW instruction sets using static binary translation and Hardware-Assisted Virtualization.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Fast simulation of systems embedding VLIW processors.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
On MPSoC Software Execution at the Transaction Level.
IEEE Des. Test Comput., 2011

Speeding-up SIMD instructions dynamic binary translation in embedded processor simulation.
Proceedings of the Design, Automation and Test in Europe, 2011

2009
Embedded software energy characterization: Using non-intrusive measures for application source code annotation.
J. Embed. Comput., 2009

Practical Design Space Exploration of an H264 Decoder for Handheld Devices Using a Virtual Platform.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

Adaptive Dynamic Voltage and Frequency Scaling Algorithm for Symmetric Multiprocessor Architecture.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Using binary translation in event driven simulation for fast and flexible MPSoC simulation.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2007
eSimu: a Fast and Accurate Energy Consumption Simulator for Real Embedded System.
Proceedings of the 2007 International Symposium on a World of Wireless, 2007

Survey and Benchmark of Stream Ciphers for Wireless Sensor Networks.
Proceedings of the Information Security Theory and Practices. Smart Cards, 2007

Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

Worldsens: from lab to sensor network application development and deployment.
Proceedings of the 6th International Conference on Information Processing in Sensor Networks, 2007


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