Haoxiang Zhou
Orcid: 0009-0004-1505-6346
According to our database1,
Haoxiang Zhou
authored at least 9 papers
between 2021 and 2025.
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Bibliography
2025
A 28-nm 135.19 TOPS/W Bootstrapped-SRAM Compute-in-Memory Accelerator With Layer-Wise Precision and Sparsity.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2025
A Layer-wised Mixed-Precision CIM Accelerator with Bit-level Sparsity-aware ADCs for NAS-Optimized CNNs.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2023
IEEE Trans. Neural Networks Learn. Syst., October, 2023
Dynamic maintenance of updating rough approximations in interval-valued ordered decision systems.
Appl. Intell., October, 2023
J. Intell. Fuzzy Syst., 2023
RISC-V based Fully-Parallel SRAM Computing-in-Memory Accelerator with High Hardware Utilization and Data Reuse Rate.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Expert Syst. Appl., 2021