Hari Cherupalli

According to our database, Hari Cherupalli authored at least 10 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A scalable symbolic simulation tool for low power embedded systems.

Subhash Sethumurugan, Shashank Hegde, Hari Cherupalli, John Sartori

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems.

Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2018

Bespoke Processors for Applications with Ultra-Low Area and Power Constraints.

Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori

IEEE Micro, 2018

2017

Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors.

Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori

ACM Trans. Comput. Syst., 2017

Software-based gate-level information flow security for IoT systems.

Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Scalable N-worst algorithms for dynamic timing and activity analysis.

Hari Cherupalli, John Sartori

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Enabling Effective Module-Oblivious Power Gating for Embedded Processors.

Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems.

Hari Cherupalli, Rakesh Kumar, John Sartori

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Automated error prediction for approximate sequential circuits.

Amrut Kapare, Hari Cherupalli, John Sartori

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015

Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions.

Hari Cherupalli, John Sartori

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015