Hee Chul Lee

According to our database1, Hee Chul Lee authored at least 16 papers between 2004 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2018
Mismatch-tolerant read-in IC with voltage-drop compensation for infrared scene projectors [IEICE Electronics Express Vol. 15(2018) No. 11 pp. 20180182].
IEICE Electron. Express, 2018

Mismatch-tolerant read-in IC with voltage-drop compensation for infrared scene projectors.
IEICE Electron. Express, 2018

2016
Neural Probes for Chronic Applications.
Micromachines, 2016

2012
Design of a Readout Circuit for Improving the SNR of Satellite Infrared Time Delay and Integration Arrays.
IEICE Trans. Electron., 2012

Fabrication and Characterization of Ferroelectric Poly(Vinylidene Fluoride-Trifluoroethylene) (P(VDF-TrFE)) Thin Film on Flexible Substrate by Detach-and-Transferring.
IEICE Trans. Electron., 2012

2011
Design of a Smart CMOS Readout Circuit for Panoramic X-Ray Time Delay and Integration Arrays.
IEICE Trans. Electron., 2011

Pixel-Level ADC with Two-Step Integration for 2-D Microbolometer IRFPA.
IEICE Trans. Electron., 2011

2009
Poly(3, 4-Ethylenedioxythiophene): Poly(Styrenesulfonate) (PEDOT: PSS) Films for the Microbolometer Applications.
IEICE Trans. Electron., 2009

Low Power Pixel-Level ADC Readout Circuit for an Amorphous Silicon-Based Microbolometer.
IEICE Trans. Electron., 2009

2008
In-Pixel Edge Detection Circuit without Non-uniformity Correction for an Infrared Focal Plane Array (IRFPA).
IEICE Trans. Electron., 2008

2006
High-Performance Pixelwise Readout Integrated Circuits for Microbolometer.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Smart CMOS Charge Transfer Readout Circuit for Time Delay and Integration Arrays.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Novel current-mode background suppression for 2-D LWIR applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Multiple integration method for a high signal-to-noise ratio readout integrated circuit.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Optimum Solution of On-Chip A/D Converter for Cooled Type Infrared Focal Plane Array.
IEICE Trans. Electron., 2005

2004
Multiple integration method for high signal-to-noise ratio readout integrated circuit [IR focal plane array applications].
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004


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