Heiko Schröder

According to our database1, Heiko Schröder
  • authored at least 72 papers between 1983 and 2009.
  • has a "Dijkstra number"2 of four.



In proceedings 
PhD thesis 



On csauthors.net:


Antibandwidth and cyclic antibandwidth of meshes and hypercubes.
Discrete Mathematics, 2009

SHREC: a short-read error correction method.
Bioinformatics, 2009

High Performance Computing for Visualisation and Image Analysis.
Proceedings of the Visual Informatics: Bridging Research and Practice, 2009

BMA - Boolean Matrices as Model for Motif Kernels.
Proceedings of the International Conference on Bioinformatics, 2008

Solving the Bottleneck Problem in Bioinformatics Computing: An Architectural Perspective.
VLSI Signal Processing, 2007

Efficient reconfigurable techniques for VLSI arrays with 6-port switches.
IEEE Trans. VLSI Syst., 2005

Efficient Techniques and Hardware Analysis for Mesh-Connected Processors.
Proceedings of the Distributed and Parallel Computing, 2005

A Gradient Based Weighted Averaging Method for Estimation of Fingerprint Orientation Fields.
Proceedings of the International Conference on Digital Image Computing: Techniques and Applications, 2005

Major line removal morphological hough transform on a hybrid system.
J. Parallel Distrib. Comput., 2004

Cyclic cutwidths of the two-dimensional ordinary and cylindrical meshes.
Discrete Applied Mathematics, 2004

A Dihedral Angle Database of Short Sub-sequences for Protein Structure Prediction.
Proceedings of the Second Asia-Pacific Bioinformatics Conference (APBC 2004), 2004

MIMD-SIMD hybrid system--towards a new low cost parallel system.
Parallel Computing, 2003

Fast solution of large N×N matrix equations in an MIMD-SIMD Hybrid System.
Parallel Computing, 2003

Permutation Communication in All-Optical Rings.
Parallel Processing Letters, 2002

A hybrid architecture for bioinformatics.
Future Generation Comp. Syst., 2002

Fast Processing of Medical Images Using a New Parallel Architecture, the Hybrid System.
Proceedings of the 5th IEEE Southwest Symposium on Image Analysis and Interpretation, 2002

Massively Parallel Solutions for Molecular Sequence Analysis.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Performance evaluation of instruction systolic array processors.
Proceedings of the Seventh International Conference on Control, 2002

Hybrid System, A New Low Cost Parallel Cluster.
Proceedings of the 16th Annual International Symposium on High Performance Computing Systems and Applications, 2002

New Architecture and Algorithms for Degradable VLSI/WSI Arrays.
Proceedings of the Computing and Combinatorics, 8th Annual International Conference, 2002

Tomographic Image Reconstruction on the Instruction Systolic Array.
Computers and Artificial Intelligence, 2001

A Hybrid Architecture for Multimedia Processors.
Computers and Artificial Intelligence, 2001

A Minimal Reduction Approach for the Collapsing Knapsack Problem.
Computers and Artificial Intelligence, 2001

Protein Sequence Comparison on the Instruction Systolic Array.
Proceedings of the Parallel Computing Technologies, 2001

Scanning Biosequence Databases on a Hybrid Parallel Architecture.
Proceedings of the Euro-Par 2001: Parallel Processing, 2001

Fault-Tolerant Routing on Complete Josephus Cubes.
Proceedings of the 6th Australasian Computer Systems Architecture Conference (ACSAC 2001), 2001

Evolutionary graph colouring.
Inf. Process. Lett., 2000

Diameter of the Knödel Graph.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 2000

A Morphological Approach to Hough Transform on an Instruction Systolic Array.
Computers and Artificial Intelligence, 1999

Cyclic Cutwidth of the Mesh.
Proceedings of the SOFSEM '99, Theory and Practice of Informatics, 26th Conference on Current Trends in Theory and Practice of Informatics, Milovy, Czech Republic, November 27, 1999

Evolutionary Graph Colouring.
Proceedings of the SIROCCO'99, 1999

On permutation communications in all-optical rings.
Proceedings of the SIROCCO'98, 1998

Long Operand Arithmetic on Instruction Systolic Computer Architectures and Its Application in RSA Cryptography.
Proceedings of the Euro-Par '98 Parallel Processing, 1998

Optical All-to-All Communication for Some Product Graphs.
Proceedings of the SOFSEM '97: Theory and Practice of Informatics, 1997

Approximation Algorithms for the Vertex Bipartization Problem.
Proceedings of the SOFSEM '97: Theory and Practice of Informatics, 1997

Morphological Hough Transform on the Instruction Systolic Array.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

Token Distribution and Load Balancing on Reconfigurable d-dimensional Meshes.
Parallel Algorithms Appl., 1996

RMB - A Reconfigurable Multiple Bus Network.
Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

Routing and Sorting on Reconfigurable Meshes.
Parallel Processing Letters, 1995

Fast Deterministic Hot-Potato Routing on Processor Arrays.
Proceedings of the Algorithms and Computation, 5th International Symposium, 1994

Deterministic Permutation Routing on a Reconfigurable Mesh.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

Systolic codebook generation [speech recognition].
IEEE Trans. Speech and Audio Processing, 1993

Problem Heaps and Their Evaluation.
Parallel Processing Letters, 1993

A Short Proof of the Dilation of a Toroidal Mesh in a Path.
Inf. Process. Lett., 1993

PIPADS - a low cost real-time visualization tool.
Proceedings of the Proceedings Supercomputing '93, 1993

A Superior Class of Networks for Reconfigurable Meshes.
Proceedings of the 6th International Parallel Processing Symposium, 1992

Program compression on the instruction systolic array.
Parallel Computing, 1991

Systolic algorithm for polynomial interpolation and related problems.
Parallel Computing, 1991

Systolic computation of characteristic polynomials of Hessenberg matrices.
Parallel Computing, 1991

Systolic algorithm for multivariable approximation using tensor products of basis functions.
Parallel Computing, 1991

Parallel algorithms and a systolic device for cubic B-spline curve and surface generation.
Computers & Graphics, 1991

Optimal Embedding of a Toroidal Array in a Linear Array.
Proceedings of the Fundamentals of Computation Theory, 8th International Symposium, 1991

A programmable systolic device for image processing based on mathematical morphology.
Parallel Computing, 1990

Systolic algorithm for tensor products of matrices: implementation and applications.
Parallel Computing, 1990

Effective reconfiguration algorithms in fault-tolerant processor arrays.
Comput. Syst. Sci. Eng., 1990

Ein erweitertes Modell der Bewegungswahrnehmung zur Interpolation von Zwischenbildern.
Proceedings of the ASST '90, 1990

Systolic s²-Way Merge Sort is Optimal.
IEEE Trans. Computers, 1989

A simple systolic method to find all bridges of an undirected graph.
Parallel Computing, 1989

Systolic arrays for parallel matrix g-inversion and finding Petri net invariants.
Parallel Computing, 1989

Top-Down Designs of Instruction Systolic Arrays for Polynomial Interpolation and Evaluation.
J. Parallel Distrib. Comput., 1989

Effective Reconfiguration Algorithms in Fault Tolerant Mesh-Connected Networks.
Australian Computer Journal, 1989

Microprogramming instruction systolic arrays.
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989

The instruction systolic array and its relation to other models of parallel computers.
Parallel Computing, 1988

VLSI-sorting evaluated under the linear model.
J. Complexity, 1988

Instruction Systolic Array - Tradeoff Between Flexibility and Speed.
Comput. Syst. Sci. Eng., 1988

A Simple Systolic Method to Find all Bridges of an Undirected Graph.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 1988

Dictionary Machines for Different Models of VLSI.
IEEE Trans. Computers, 1985

Systolic Sorting on a Mesh-Connected Network.
IEEE Trans. Computers, 1985

A Method for Realistic Comparisons of Sorting Algorithms for VLSI.
FODO, 1985

VLSI-Realisierungen von Sortieralgorithmen.
Proceedings of the Fachgespräche auf der 14. GI-Jahrestagung, 1984

A Fast Sorting Algorithm for VLSI.
Proceedings of the Automata, 1983

Partition Sorts for VLSI.
Proceedings of the GI - 13. Jahrestagung, Hamburg, 3.-7. Oktober 1983, Proceedings, 1983