Heiko Schröder

Affiliations:
  • RMIT University, Melbourne, Australia
  • Nanyang Technological University Singapore, Singapore (former)
  • University of Newcastle, Newcastle, NSW, Australia (former)
  • Universität Kiel, Kiel, Germany (former)


According to our database1, Heiko Schröder authored at least 60 papers between 1983 and 2009.

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Bibliography

2009
Antibandwidth and cyclic antibandwidth of meshes and hypercubes.
Discret. Math., 2009

SHREC: a short-read error correction method.
Bioinform., 2009

High Performance Computing for Visualisation and Image Analysis.
Proceedings of the Visual Informatics: Bridging Research and Practice, 2009

2008
BMA - Boolean Matrices as Model for Motif Kernels.
Proceedings of the International Conference on Bioinformatics, 2008

2007
Solving the Bottleneck Problem in Bioinformatics Computing: An Architectural Perspective.
J. VLSI Signal Process., 2007

2004
Major line removal morphological hough transform on a hybrid system.
J. Parallel Distributed Comput., 2004

Cyclic cutwidths of the two-dimensional ordinary and cylindrical meshes.
Discret. Appl. Math., 2004

2003
MIMD-SIMD hybrid system--towards a new low cost parallel system.
Parallel Comput., 2003

Fast solution of large N×N matrix equations in an MIMD-SIMD Hybrid System.
Parallel Comput., 2003

2002
Permutation Communication in All-Optical Rings.
Parallel Process. Lett., 2002

A hybrid architecture for bioinformatics.
Future Gener. Comput. Syst., 2002

Fast Processing of Medical Images Using a New Parallel Architecture, the Hybrid System.
Proceedings of the 5th IEEE Southwest Symposium on Image Analysis and Interpretation, 2002

Massively Parallel Solutions for Molecular Sequence Analysis.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Performance evaluation of instruction systolic array processors.
Proceedings of the Seventh International Conference on Control, 2002

Hybrid System, A New Low Cost Parallel Cluster.
Proceedings of the 16th Annual International Symposium on High Performance Computing Systems and Applications, 2002

2001
Tomographic Image Reconstruction on the Instruction Systolic Array.
Comput. Artif. Intell., 2001

A Hybrid Architecture for Multimedia Processors.
Comput. Artif. Intell., 2001

Protein Sequence Comparison on the Instruction Systolic Array.
Proceedings of the Parallel Computing Technologies, 2001

Scanning Biosequence Databases on a Hybrid Parallel Architecture.
Proceedings of the Euro-Par 2001: Parallel Processing, 2001

2000
Evolutionary graph colouring.
Inf. Process. Lett., 2000

Diameter of the Knödel Graph.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 2000

1999
Multiplication of Matrices With Different Sparseness Properties on Dynamically Reconfigurable Meshes.
VLSI Design, 1999

A Morphological Approach to Hough Transform on an Instruction Systolic Array.
Comput. Artif. Intell., 1999

Cyclic Cutwidth of the Mesh.
Proceedings of the SOFSEM '99, Theory and Practice of Informatics, 26th Conference on Current Trends in Theory and Practice of Informatics, Milovy, Czech Republic, November 27, 1999

1998
On permutation communications in all-optical rings.
Proceedings of the SIROCCO'98, 1998

Long Operand Arithmetic on Instruction Systolic Computer Architectures and Its Application in RSA Cryptography.
Proceedings of the Euro-Par '98 Parallel Processing, 1998

1997
Optical All-to-All Communication for Some Product Graphs.
Proceedings of the SOFSEM '97: Theory and Practice of Informatics, 1997

Approximation Algorithms for the Vertex Bipartization Problem.
Proceedings of the SOFSEM '97: Theory and Practice of Informatics, 1997

Morphological Hough Transform on the Instruction Systolic Array.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

1996
Token Distribution and Load Balancing on Reconfigurable <i>d</i>-dimensional Meshes.
Parallel Algorithms Appl., 1996

RMB - A Reconfigurable Multiple Bus Network.
Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

1995
Routing and Sorting on Reconfigurable Meshes.
Parallel Process. Lett., 1995

1994
Fast Deterministic Hot-Potato Routing on Processor Arrays.
Proceedings of the Algorithms and Computation, 5th International Symposium, 1994

Deterministic Permutation Routing on a Reconfigurable Mesh.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

1993
Systolic codebook generation [speech recognition].
IEEE Trans. Speech Audio Process., 1993

Problem Heaps and Their Evaluation.
Parallel Process. Lett., 1993

A Short Proof of the Dilation of a Toroidal Mesh in a Path.
Inf. Process. Lett., 1993

PIPADS - a low cost real-time visualization tool.
Proceedings of the Proceedings Supercomputing '93, 1993

1991
Systolic algorithm for polynomial interpolation and related problems.
Parallel Comput., 1991

Systolic computation of characteristic polynomials of Hessenberg matrices.
Parallel Comput., 1991

Systolic algorithm for multivariable approximation using tensor products of basis functions.
Parallel Comput., 1991

Optimal Embedding of a Toroidal Array in a Linear Array.
Proceedings of the Fundamentals of Computation Theory, 8th International Symposium, 1991

1990
A programmable systolic device for image processing based on mathematical morphology.
Parallel Comput., 1990

Systolic algorithm for tensor products of matrices: implementation and applications.
Parallel Comput., 1990

Effective reconfiguration algorithms in fault-tolerant processor arrays.
Comput. Syst. Sci. Eng., 1990

1989
Systolic s²-Way Merge Sort is Optimal.
IEEE Trans. Computers, 1989

A simple systolic method to find all bridges of an undirected graph.
Parallel Comput., 1989

Systolic arrays for parallel matrix g-inversion and finding Petri net invariants.
Parallel Comput., 1989

Top-Down Designs of Instruction Systolic Arrays for Polynomial Interpolation and Evaluation.
J. Parallel Distributed Comput., 1989

Effective Reconfiguration Algorithms in Fault Tolerant Mesh-Connected Networks.
Aust. Comput. J., 1989

Microprogramming instruction systolic arrays.
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989

1988
The instruction systolic array and its relation to other models of parallel computers.
Parallel Comput., 1988

VLSI-sorting evaluated under the linear model.
J. Complex., 1988

Instruction Systolic Array - Tradeoff Between Flexibility and Speed.
Comput. Syst. Sci. Eng., 1988

1985
Dictionary Machines for Different Models of VLSI.
IEEE Trans. Computers, 1985

Systolic Sorting on a Mesh-Connected Network.
IEEE Trans. Computers, 1985

A Method for Realistic Comparisons of Sorting Algorithms for VLSI.
Proceedings of the Foundations of Data Organization, 1985

1984
VLSI-Realisierungen von Sortieralgorithmen.
Proceedings of the Fachgespräche auf der 14. GI-Jahrestagung, 1984

1983
A Fast Sorting Algorithm for VLSI.
Proceedings of the Automata, 1983

Partition Sorts for VLSI.
Proceedings of the GI - 13. Jahrestagung, Hamburg, 3.-7. Oktober 1983, Proceedings, 1983


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