Helvio P. Peixoto

According to our database1, Helvio P. Peixoto authored at least 5 papers between 1997 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2001
A Survey of Digital Design Reuse.
IEEE Des. Test Comput., 2001

2000
A Tight Area Upper Bound for Slicing Floorplans.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

A new technique for estimating lower bounds on latency for high level synthesis.
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1999
The Design Space Layer: Supporting Early Design Space Exploration for Core-Based Designs.
Proceedings of the 1999 Design, 1999

1997
Algorithm and architecture-level design space exploration using hierarchical data flows.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997


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