Heng Zhang

According to our database, Heng Zhang authored at least 5 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Corrections to "An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks".

Heng Zhang, Wenhe Yin, Sunan He, Yuan Du, Li Du

IEEE Trans. Very Large Scale Integr. Syst., September, 2025

2024

An 11T1C Bit-Level-Sparsity-Aware Computing- in-Memory Macro With Adaptive Conversion Time and Computation Voltage.

Ye Lin, Yuandong Li, Heng Zhang, He Ma, Jingjing Lv, Anying Jiang, Yuan Du, Li Du

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks.

Heng Zhang, Wenhe Yin, Sunan He, Yuan Du, Li Du

IEEE Trans. Very Large Scale Integr. Syst., October, 2024

A Compilation Framework for SRAM Computing-in-Memory Systems With Optimized Weight Mapping and Error Correction.

Yichuan Bai, Yaqing Li, Heng Zhang, Aojie Jiang, Yuan Du, Li Du

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024

2023

SSM-CIM: An Efficient CIM Macro Featuring Single-Step Multi-bit MAC Computation for CNN Edge Inference.

Heng Zhang, Sunan He, Xin Lu, Xinjie Guo, Shaodi Wang, Yuan Du, Li Du

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023