Hiroshi Onoda
Orcid: 0000-0002-6766-0682
According to our database1,
Hiroshi Onoda authored at least 10 papers
between 1994 and 2026.
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Bibliography
2026
Development and Application of Breakdown T&BRL, a Novel Evaluation Framework for Social Implementation Assessment: A Case Study on Mobility Robot Devices.
Int. J. Autom. Technol., January, 2026
CFDiff: A Diffusion-Based Generative Framework for Efficient Multiphysical Field Prediction in Smart IoT.
IEEE Internet Things J., 2026
2025
Proceedings of the 28th International Symposium on Wireless Personal Multimedia Communications, 2025
2022
Readiness Status of Artificial Intelligence Applications on Electric Vehicles: A mini global review and analysis using the J-TRA method.
Proceedings of the International Conference on Engineering and Information Technology for Sustainable Industry, 2022
2020
Environmental and Economic Evaluation of a Mechanical Biological Treatment System for a Small and Medium-Sized Waste Treatment Facility Considering the Karatsu Smart Disaster-Resilience Base Construction Project.
Int. J. Autom. Technol., 2020
2013
0.5 V Start-Up 87% Efficiency 0.75 mm<sup>2</sup> On-Chip Feed-Forward Single-Inductor Dual-Output (SIDO) Boost DC-DC Converter for Battery and Solar Cell Operation Sensor Network Micro-Computer Integration.
IEEE J. Solid State Circuits, 2013
2012
A 0.5V start-up 87% efficiency 0.75mm<sup>2</sup> on-chip feed-forward single-inductor dual-output (SIDO) boost DC-DC converter for battery and solar cell operation sensor network micro-computer integration.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
0.8V start-up 92% efficiency on-chip boost DC-DC converters for battery operation micro-computers.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
1994
Memory array architecture and decoding scheme for 3 V only sector erasable DINOR flash memory.
IEEE J. Solid State Circuits, April, 1994