Hiroto Tagata

According to our database¹, Hiroto Tagata authored at least 2 papers between 2024 and 2025.

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2025

Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation.

[BibT_eX]

[DOI]

CoRR, June, 2025

2024

Double MAC on a Cell: A 22-nm 8T-SRAM-Based Analog In-Memory Accelerator for Binary/Ternary Neural Networks Featuring Split Wordline.

[BibT_eX]

[DOI]

IEEE Open J. Circuits Syst., 2024