Hoai Luan Pham
Orcid: 0000-0002-4272-0132Affiliations:
- Nara Institute of Science and Technology, NAIST, Graduate School of Information Science, Japan
According to our database1,
Hoai Luan Pham
authored at least 54 papers
between 2018 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2025
MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2025
CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025
AES-RV: Hardware-Efficient RISC-V Accelerator with Low-Latency AES Instruction Extension for IoT Security.
CoRR, May, 2025
Qimax: Efficient quantum simulation via GPU-accelerated extended stabilizer formalism.
CoRR, May, 2025
ZeroSlide: Is Zero-Shot Classification Adequate for Lifelong Learning in Whole-Slide Image Analysis in the Era of Pathology Vision-Language Foundation Models?
CoRR, April, 2025
CoRR, February, 2025
Benchmarking Variants of the Adam Optimizer for Quantum Machine Learning Applications.
IEEE Open J. Comput. Soc., 2025
MRCA 2.0: An Area-Optimized Multigrained Reconfigurable Cryptographic Accelerator for Securing Blockchain-Based Internet of Things Systems.
IEEE Micro, 2025
FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations.
IEEE Access, 2025
Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation.
IEEE Access, 2025
UniCrypt: Universal Crypto Engine with Optimized Resource Sharing for Security Applications.
Proceedings of the IEEE Symposium on Low-Power and High-Speed Chips and Systems, 2025
2024
LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024
Flexible and Energy-Efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-Based IoT Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024
Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs.
CoRR, 2024
Efficient Random Quantum Circuit Generator: A Benchmarking Approach for Quantum Simulators.
Proceedings of the International Conference on Computing and Communication Technologies, 2024
Hator: A High-Efficiency CGRA-Based 32/64-Bit Hashing Accelerator with Real-Time Performance Analysis.
Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024
Theoretical Analysis of the Memory-Efficient Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs.
Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024
Proceedings of the 21st International SoC Design Conference, 2024
Proceedings of the 21st International SoC Design Conference, 2024
UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications.
Proceedings of the 21st International SoC Design Conference, 2024
Proceedings of the 21st International SoC Design Conference, 2024
Proceedings of the 21st International SoC Design Conference, 2024
Kyberator: A High-Efficiency FPGA-Based Multi-Mode CRYSTALS-Kyber Accelerator for Quantum-Resistant Security Applications.
Proceedings of the 21st International SoC Design Conference, 2024
A High-Performance FPGA Based on Convolutional Neural Network for QRS Complex Detection.
Proceedings of the 15th International Conference on Computing Communication and Networking Technologies, 2024
MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024
Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation.
Proceedings of the Twelfth International Symposium on Computing and Networking, CANDAR 2024, 2024
PESA: Power-Efficient SPHINCS+ Accelerator for Multi-Domain Security Applications on FPGA SoC.
Proceedings of the Twelfth International Symposium on Computing and Networking, 2024
Proceedings of the Twelfth International Symposium on Computing and Networking, 2024
Proceedings of the 18th International Conference on Advanced Computing and Analytics, 2024
2023
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications.
IEEE Des. Test, October, 2023
Sensors, August, 2023
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023
Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing.
Proceedings of the International Conference on Computing and Communication Technologies, 2023
Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Energy-Efficient 3D Convolution Using Interposed Memory Accelerator eXtension 2 for Medical Image Processing.
Proceedings of 2023 International Conference on Medical Imaging and Computer-Aided Diagnosis, 2023
High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms.
Proceedings of the 15th International Conference on Knowledge and Systems Engineering, 2023
Proceedings of the International Conference on IC Design and Technology, 2023
Proceedings of the Eleventh International Symposium on Computing and Networking, CANDAR 2023, Matsue, Japan, November 28, 2023
2022
IEEE Access, 2022
A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
2021
BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security.
IEEE Access, 2021
High Performance Multicore SHA-256 Accelerator using Fully Parallel Computation and Local Memory.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2021
2020
Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining.
IEEE Access, 2020
2019
Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2019
2018
Design and Hardware Implementation of Improved Precision Time Protocol for High Speed Automotive Wireless Transmission System.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018
Proceedings of the IEEE Globecom Workshops, 2018