Hong-Yeol Lim

According to our database1, Hong-Yeol Lim authored at least 8 papers between 2011 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
An adaptive cache replacement policy based on fine-grain reusability monitor.
IEICE Electron. Express, 2018

2017
An analytical model based on performance demand of workload for energy-efficient heterogeneous multicore systems.
J. Parallel Distributed Comput., 2017

2016
Cooperative cache memory (CCM) based on the performance efficiency for 3D stacked memory system.
IEICE Electron. Express, 2016

2015
Accelerating Application Start-up with Nonvolatile Memory in Android Systems.
IEEE Micro, 2015

2013
An adaptive L2 cache prefetching mechanism for effective exploitation of abundant memory bandwidth of 3-D IC technology.
IEICE Electron. Express, 2013

Versatile stream buffer architecture to exploit the high memory bandwidth of 3-D IC technology.
IEICE Electron. Express, 2013

Phase detection based data prefetching for utilizing memory bandwidth of 3D integrated circuits.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2011
Adaptive prefetching scheme for exploiting massive memory bandwidth of 3-D IC technology.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011


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