Hoseok Chang

According to our database1, Hoseok Chang authored at least 9 papers between 2003 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.
J. Signal Process. Syst., 2009

Access-Pattern-Aware On-Chip Memory Allocation for SIMD Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

SIMD processor based implementation of recursive filtering equations.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

2008
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
Performance Optimization of a Multimedia Player on a Mobile CPU Platform.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2006
Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

An FPGA based SIMD processor with a vector memory unit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Compressed Swapping for NAND Flash Memory Based Embedded Systems.
Proceedings of the Embedded Computer Systems: Architectures, 2005

2003
Optimization of power consumption for an ARM7-based multimedia handheld device.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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