# Wonyong Sung

According to our database

Collaborative distances:

^{1}, Wonyong Sung authored at least 151 papers between 1980 and 2020.Collaborative distances:

## Timeline

#### Legend:

Book In proceedings Article PhD thesis Other## Links

#### On csauthors.net:

## Bibliography

2020

S-SGD: Symmetrical Stochastic Gradient Descent with Weight Noise Injection for Reaching Flat Minima.

CoRR, 2020

CoRR, 2020

SQWA: Stochastic Quantized Weight Averaging for Improving the Generalization Capability of Low-Precision Deep Neural Networks.

CoRR, 2020

Low-Latency Lightweight Streaming Speech Recognition with 8-Bit Quantized Simple Gated Convolutional Neural Networks.

Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

HLHLp: Quantized Neural Networks Training for Reaching Flat Minima in Loss Surface.

Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020

2019

J. Signal Process. Syst., 2019

Empirical Analysis of Knowledge Distillation Technique for Optimization of Quantized Deep Neural Networks.

CoRR, 2019

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Proceedings of the IEEE International Conference on Acoustics, 2019

Proceedings of the IEEE International Conference on Acoustics, 2019

Proceedings of the IEEE Automatic Speech Recognition and Understanding Workshop, 2019

2018

Single Stream Parallelization of Recurrent Neural Networks for Low Power and Fast Inference.

CoRR, 2018

Proceedings of the 2018 IEEE Spoken Language Technology Workshop, 2018

Massively parallel computation of linear recurrence equations with graphics processing units.

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

Proceedings of the Interspeech 2018, 2018

Character-level Language Modeling with Gated Hierarchical Recurrent Neural Networks.

Proceedings of the Interspeech 2018, 2018

2017

ACM J. Emerg. Technol. Comput. Syst., 2017

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Structured sparse ternary weight coding of deep neural networks for efficient hardware implementations.

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Proceedings of the Advances in Neural Information Processing Systems 30: Annual Conference on Neural Information Processing Systems 2017, 2017

Fixed-point optimization of deep neural networks with adaptive step size retraining.

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

2016

CoRR, 2016

CoRR, 2016

CoRR, 2016

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Architecture exploration of a programmable neural network processor for embedded systems.

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Dynamic hand gesture recognition for wearable devices with low complexity recurrent neural networks.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Proceedings of the 33nd International Conference on Machine Learning, 2016

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Proceedings of the 2016 22nd Asia-Pacific Conference on Communications (APCC), 2016

2015

Low Energy Signal Processing Techniques for Reliability Improvement of High-Density NAND Flash Memory.

J. Signal Process. Syst., 2015

CoRR, 2015

Online Sequence Training of Recurrent Neural Networks with Connectionist Temporal Classification.

CoRR, 2015

CoRR, 2015

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Fixed point optimization of deep convolutional neural networks for object recognition.

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2014

J. Signal Process. Syst., 2014

Rate-0.96 LDPC Decoding VLSI for Soft-Decision Error Correction of NAND Flash Memory.

IEEE Trans. Very Large Scale Integr. Syst., 2014

Decision Directed Estimation of Threshold Voltage Distribution in NAND Flash Memory.

IEEE Trans. Signal Process., 2014

ACM Trans. Design Autom. Electr. Syst., 2014

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Proceedings of the IEEE International Conference on Acoustics, 2014

Proceedings of the IEEE International Conference on Acoustics, 2014

2013

Proceedings of the Handbook of Signal Processing Systems, 2013

Least Squares Based Coupling Cancelation for MLC NAND Flash Memory with a Small Number of Voltage Sensing Operations.

J. Signal Process. Syst., 2013

J. Signal Process. Syst., 2013

Estimation of NAND Flash Memory Threshold Voltage Distribution for Optimum Soft-Decision Error Correction.

IEEE Trans. Signal Process., 2013

Load Balanced Resampling for Real-Time Particle Filtering on Graphics Processing Units.

IEEE Trans. Signal Process., 2013

Signal processing techniques for reliability improvement of sub-20NM NAND flash memory.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

DRAM access reduction in GPUs by thread-block scheduling for overlapped data reuse.

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Proceedings of the IEEE International Conference on Acoustics, 2013

Soft-decision decoding with cell to cell interference removed signal in nand flash memory.

Proceedings of the IEEE International Conference on Acoustics, 2013

2012

Flexible and Expandable Speech Recognition Hardware with Weighted Finite State Transducers.

J. Signal Process. Syst., 2012

J. Signal Process. Syst., 2012

J. Signal Process. Syst., 2012

EURASIP J. Adv. Signal Process., 2012

Optimal Output Quantization of Binary Input AWGN Channel for Belief-Propagation Decoding of LDPC Codes.

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Performance of rate 0.96 (68254, 65536) EG-LDPC code for NAND Flash memory error correction.

Proceedings of IEEE International Conference on Communications, 2012

Least squares based cell-to-cell interference cancelation technique for multi-level cell nand flash memory.

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012

2011

J. Signal Process. Syst., 2011

Memory Access Optimized Implementation of Cyclic and Quasi-Cyclic LDPC Codes on a GPGPU.

J. Signal Process. Syst., 2011

Trends in Design and Implementation of Signal Processing Systems [In the Spotlight].

IEEE Signal Process. Mag., 2011

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Proceedings of the IEEE International Conference on Acoustics, 2011

H- and C-level WFST-based large vocabulary continuous speech recognition on Graphics Processing Units.

Proceedings of the IEEE International Conference on Acoustics, 2011

2010

VLSI Implementation of BCH Error Correction for Multilevel Cell NAND Flash Memory.

IEEE Trans. Very Large Scale Integr. Syst., 2010

IEEE Trans. Consumer Electron., 2010

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

VLSI Implementation of a High-Throughput Soft-Bit-Flipping Decoder for Geometric LDPC Codes.

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Adaptive Threshold Technique for Bit-Flipping Decoding of Low-Density Parity-Check Codes.

IEEE Commun. Lett., 2010

Parallel implementation of an error diffusion halftoning algorithm with a general purpose graphics processing unit.

Proceedings of the International Conference on Image Processing, 2010

Multi-core and SIMD architecture based implementation of recursive digital filtering algorithms.

Proceedings of the IEEE International Conference on Acoustics, 2010

An FPGA implementation of speech recognition with weighted finite state transducers.

Proceedings of the IEEE International Conference on Acoustics, 2010

Proceedings of the Handbook of Signal Processing Systems, 2010

2009

Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.

J. Signal Process. Syst., 2009

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

IEEE Trans. Computers, 2009

IEEE Signal Process. Mag., 2009

Massively parallel implementation of cyclic LDPC codes on a general purpose graphics processing unit.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Low-power implementation of a high-throughput LDPC decoder for IEEE 802.11N standard.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Scalable HMM based inference engine in large vocabulary continuous speech recognition.

Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009

OpenMP-based parallel implementation of a continuous speech recognizer on a multi-core system.

Proceedings of the IEEE International Conference on Acoustics, 2009

Proceedings of the IEEE International Conference on Acoustics, 2009

2008

Algorithm and Software Optimization of Variable Block Size Motion Estimation for H.264/AVC on a VLIW-SIMD DSP.

J. Signal Process. Syst., 2008

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Proceedings of the 2008 16th European Signal Processing Conference, 2008

Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware.

Proceedings of the 2008 International Conference on Compilers, 2008

2007

Fast Block Mode Decision for H.264/AVC on a Programmable Digital Signal Processor.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Memory Access Reduced Software Implementation of H.264/AVC Sub-pixel Motion Estimation Using Differential Data Encoding.

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Mobile CPU Based Optimization of Fast Likelihood Computation for Continuous Speech Recognition.

Proceedings of the IEEE International Conference on Acoustics, 2007

2006

IEICE Trans. Inf. Syst., 2006

A Robust Formant Extraction Algorithm Combining Spectral Peak Picking and Root Polishing.

EURASIP J. Adv. Signal Process., 2006

Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash Memories.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005

J. VLSI Signal Process., 2005

J. VLSI Signal Process., 2005

Proceedings of the Embedded Computer Systems: Architectures, 2005

Memory access overhead reduction for a digital color copier implementation using a VLIW digital signal processor.

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Implementation of an intonational quality assessment system for a handheld device.

Proceedings of the INTERSPEECH 2004, 2004

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002

Proceedings of the 7th International Conference on Spoken Language Processing, ICSLP2002, 2002

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation.

J. VLSI Signal Process., 2001

Multimedia processor-based implementation of an error-diffusion halftoning algorithm exploiting subword parallelism.

IEEE Trans. Circuits Syst. Video Technol., 2001

Combined word-length optimization and high-level synthesis ofdigital signal processing systems.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Proceedings of the IEEE International Conference on Acoustics, 2001

2000

IEEE Trans. Very Large Scale Integr. Syst., 2000

Proceedings of the IEEE International Conference on Acoustics, 2000

1999

IEEE Signal Process. Lett., 1999

An enhanced two-level adaptive multiple branch prediction for superscalar processors.

J. Syst. Archit., 1999

A low resolution pulse position coding method for improved excitation modeling of speech transition.

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

A floating-point to integer C converter with shift reduction for fixed-point digital signal processors.

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1998

Fixed-point error analysis and word length optimization of 8×8 IDCT architectures.

IEEE Trans. Circuits Syst. Video Technol., 1998

Proceedings of the 11th International Symposium on System Synthesis, 1998

A voice activity detector employing soft decision based noise spectrum adaptation.

Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Proceedings of the 1998 Design, 1998

Proceedings of the ASP-DAC '98, 1998

Proceedings of the Proceedings 31st Annual Simulation Symposium (SS '98), 1998

1997

Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1995

Simulation-based word-length optimization method for fixed-point digital signal processing systems.

IEEE Trans. Signal Process., 1995

An integrated hardware-software cosimulation environment for heterogeneous systems prototyping.

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1992

Multiprocessor Implementation of Digital Filtering Algorithms Using a Parallel Block Processing Method.

IEEE Trans. Parallel Distrib. Syst., 1992

Proceedings of the Application Specific Array Processors, 1992

1986

Proceedings of the IEEE International Conference on Acoustics, 1986

1985

Proceedings of the IEEE International Conference on Acoustics, 1985

1980

Proceedings of the IEEE International Conference on Acoustics, 1980