Wonyong Sung

CoRR, 2023

Token-Scaled Logit Distillation for Ternary Weight Generative Language Models.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

Enhancing Computation Efficiency in Large Language Models through Weight and Activation Quantization.

[BibT_eX]

[DOI]

Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, 2023

Single-Channel Ecg-Based Sleep Stage Classification With End-To-End Trainable Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 45th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2023

Korean Tokenization for Beam Search Rescoring in Speech Recognition.

[BibT_eX]

[DOI]

Hyewon Bae

Proceedings of the International Conference on Electronics, Information, and Communication, 2023

Teacher Intervention: Improving Convergence of Quantization Aware Training for Ultra-Low Precision Transformers.

[BibT_eX]

[DOI]

Proceedings of the 17th Conference of the European Chapter of the Association for Computational Linguistics, 2023

Sleep Model: A Sequence Model for Predicting the Next Sleep Stage.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022

Optimization of General Matrix Multiply Library for Ternary Weight for Fast DNN Inference.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2022

A Comparison of Transformer, Convolutional, and Recurrent Neural Networks on Phoneme Recognition.

[BibT_eX]

[DOI]

CoRR, 2022

Macro-Block Dropout for Improved Regularization in Training End-to-End Speech Recognition Models.

[BibT_eX]

[DOI]

Proceedings of the IEEE Spoken Language Technology Workshop, 2022

Regularizing Activation Distribution for Ultra Low-bit Quantization-Aware Training of MobileNets.

[BibT_eX]

[DOI]

Seongmin Park

Proceedings of the IEEE Workshop on Signal Processing Systems, 2022

Similarity and Content-based Phonetic Self Attention for Speech Recognition.

[BibT_eX]

[DOI]

Proceedings of the Interspeech 2022, 2022

Understanding the Role of Self Attention for Efficient Speech Recognition.

[BibT_eX]

[DOI]

Proceedings of the Tenth International Conference on Learning Representations, 2022

Performance Assessment of Automatic Sleep Stage Classification Using Only Partial PSG Sensors.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021

Convolution-Based Attention Model With Positional Encoding For Streaming Speech Recognition On Embedded Devices.

[BibT_eX]

[DOI]

Proceedings of the IEEE Spoken Language Technology Workshop, 2021

TernGEMM: GEneral Matrix Multiply Library with Ternary Weights for Fast DNN Inference.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

Layer-wise Pruning of Transformer Attention Heads for Efficient Language Modeling.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

SQWA: Stochastic Quantized Weight Averaging For Improving The Generalization Capability Of Low-Precision Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2021

Stochastic Precision Ensemble: Self-Knowledge Distillation for Quantized Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020

S-SGD: Symmetrical Stochastic Gradient Descent with Weight Noise Injection for Reaching Flat Minima.

[BibT_eX]

[DOI]

CoRR, 2020

Knowledge Distillation for Optimization of Quantized Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Quantized Neural Networks: Characterization and Holistic Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Effect of Adding Positional Information on Convolutional Neural Networks for End-to-End Speech Recognition.

[BibT_eX]

[DOI]

Proceedings of the Interspeech 2020, 2020

Low-Latency Lightweight Streaming Speech Recognition with 8-Bit Quantized Simple Gated Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

Fixed-Point Optimization of Transformer Neural Network.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

HLHLp: Quantized Neural Networks Training for Reaching Flat Minima in Loss Surface.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020

2019

Compression of Deep Neural Networks with Structured Sparse Ternary Coding.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2019

Empirical Analysis of Knowledge Distillation Technique for Optimization of Quantized Deep Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2019

Exploration of On-device End-to-End Acoustic Modeling with Neural Networks.

[BibT_eX]

[DOI]

Lukas Lee

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Workload-aware Automatic Parallelization for Multi-GPU DNN Training.

[BibT_eX]

[DOI]

Youngmin Jo

Swagath Venkataramani

Vijayalakshmi Srinivasan

Proceedings of the IEEE International Conference on Acoustics, 2019

Memorization Capacity of Deep Neural Networks under Parameter Quantization.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2019

Simple Gated Convnet for Small Footprint Acoustic Modeling.

[BibT_eX]

[DOI]

Lukas Lee

Proceedings of the IEEE Automatic Speech Recognition and Understanding Workshop, 2019

2018

Single Stream Parallelization of Recurrent Neural Networks for Low Power and Fast Inference.

[BibT_eX]

[DOI]

CoRR, 2018

On-Device End-to-end Speech Recognition with Multi-Step Parallel Rnns.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Spoken Language Technology Workshop, 2018

Massively parallel computation of linear recurrence equations with graphics processing units.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Fully Neural Network Based Speech Recognition on Mobile and Embedded Devices.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

Hierarchical Recurrent Neural Networks for Acoustic Modeling.

[BibT_eX]

[DOI]

Proceedings of the Interspeech 2018, 2018

Character-level Language Modeling with Gated Hierarchical Recurrent Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the Interspeech 2018, 2018

2017

Structured Pruning of Deep Convolutional Neural Networks.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2017

High-throughput decoding of block turbo codes on graphics processing units.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Structured sparse ternary weight coding of deep neural networks for efficient hardware implementations.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

SVD-Softmax: Fast Softmax Approximation on Large Vocabulary Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 30: Annual Conference on Neural Information Processing Systems 2017, 2017

Fixed-point optimization of deep neural networks with adaptive step size retraining.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Character-level language modeling with hierarchical recurrent neural networks.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

2016

Quantized neural network design under weight capacity constraint.

[BibT_eX]

[DOI]

CoRR, 2016

Generative Transfer Learning between Recurrent Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2016

Compact Deep Convolutional Neural Networks With Coarse Pruning.

[BibT_eX]

[DOI]

CoRR, 2016

FPGA-Based Low-Power Speech Recognition with Recurrent Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Architecture exploration of a programmable neural network processor for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Dynamic hand gesture recognition for wearable devices with low complexity recurrent neural networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Sequence to Sequence Training of CTC-RNNs with Partial Windowing.

[BibT_eX]

[DOI]

Proceedings of the 33nd International Conference on Machine Learning, 2016

Fixed-point performance analysis of recurrent neural networks.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

FPGA based implementation of deep neural networks using on-chip memory only.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Character-level incremental speech recognition with recurrent neural networks.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Learning separable fixed-point kernels for deep convolutional neural networks.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Evaluation of block turbo codes for long-haul optical networks.

[BibT_eX]

[DOI]

Proceedings of the 2016 22nd Asia-Pacific Conference on Communications (APCC), 2016

2015

Low Energy Signal Processing Techniques for Reliability Improvement of High-Density NAND Flash Memory.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2015

Resiliency of Deep Neural Networks under Quantization.

[BibT_eX]

[DOI]

CoRR, 2015

Online Sequence Training of Recurrent Neural Networks with Connectionist Temporal Classification.

[BibT_eX]

[DOI]

CoRR, 2015

Online Keyword Spotting with a Character-Level Recurrent Neural Network.

[BibT_eX]

[DOI]

Minjae Lee

CoRR, 2015

Single stream parallelization of generalized LSTM-like RNNs on a GPU.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Fixed point optimization of deep convolutional neural networks for object recognition.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2014

Area-Efficient Parallel Syndrome Generators for Linear Block Codes.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2014

Rate-0.96 LDPC Decoding VLSI for Soft-Decision Error Correction of NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

Decision Directed Estimation of Threshold Voltage Distribution in NAND Flash Memory.

[BibT_eX]

[DOI]

Nagesh B. Lakshminarayana

IEEE Trans. Signal Process., 2014

Power Modeling for GPU Architectures Using McPAT.

[BibT_eX]

[DOI]

Jieun Lim

Hyesoon Kim

William J. Song

Sudhakar Yalamanchili

ACM Trans. Design Autom. Electr. Syst., 2014

Direct and indirect measurement of inter-cell capacitance in NAND flash memory.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Fixed-point feedforward deep neural network design using weights +1, 0, and -1.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Fault tolerance analysis of digital feed-forward deep neural networks.

[BibT_eX]

[DOI]

Minjae Lee

Proceedings of the IEEE International Conference on Acoustics, 2014

X1000 real-time phoneme recognition VLSI using feed-forward deep neural networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2014

2013

Optimization of Number Representations.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Signal Processing Systems, 2013

Guest Editors' Introduction to Special Issue on Advances in DSP System Design.

[BibT_eX]

[DOI]

Jarmo Takala

Warren J. Gross

J. Signal Process. Syst., 2013

Least Squares Based Coupling Cancelation for MLC NAND Flash Memory with a Small Number of Voltage Sensing Operations.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2013

Soft-Decision Error Correction of NAND Flash Memory with a Turbo Product Code.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2013

Estimation of NAND Flash Memory Threshold Voltage Distribution for Optimum Soft-Decision Error Correction.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 2013

Load Balanced Resampling for Real-Time Particle Filtering on Graphics Processing Units.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 2013

Signal processing techniques for reliability improvement of sub-20NM NAND flash memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

DRAM access reduction in GPUs by thread-block scheduling for overlapped data reuse.

[BibT_eX]

[DOI]

Seungyeol Lee

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

GPU based implementation of recursive digital filtering algorithms.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2013

Soft-decision decoding with cell to cell interference removed signal in nand flash memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2013

2012

Flexible and Expandable Speech Recognition Hardware with Weighted Finite State Transducers.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2012

Guest Editors' Introduction.

[BibT_eX]

[DOI]

Jarmo Takala

Shuvra S. Bhattacharyya

J. Signal Process. Syst., 2012

Parallel Computation of Adaptive Filtering Algorithms on Multi-Core Systems.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2012

Low energy error correction of NAND Flash memory through soft-decision decoding.

[BibT_eX]

[DOI]

EURASIP J. Adv. Signal Process., 2012

Optimal Output Quantization of Binary Input AWGN Channel for Belief-Propagation Decoding of LDPC Codes.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

A simulation-based study for DRAM power reduction strategies in GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Performance analysis of multi-bank DRAM with increased clock frequency.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Performance of rate 0.96 (68254, 65536) EG-LDPC code for NAND Flash memory error correction.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2012

Least squares based cell-to-cell interference cancelation technique for multi-level cell nand flash memory.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Multi-user real-time speech recognition with a GPU.

[BibT_eX]

[DOI]

Jungsuk Kim

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Reducing off-chip memory traffic by selective cache management scheme in GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012

2011

Memory Access Optimized VLSI for 5000-Word Continuous Speech Recognition.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2011

Memory Access Optimized Implementation of Cyclic and Quasi-Cyclic LDPC Codes on a GPGPU.

[BibT_eX]

[DOI]

Hyunwoo Ji

J. Signal Process. Syst., 2011

Trends in Design and Implementation of Signal Processing Systems [In the Spotlight].

[BibT_eX]

[DOI]

Mohammad M. Mansour

Liang-Gee Chen

IEEE Signal Process. Mag., 2011

Reduced complexity Chase-Pyndiah decoding algorithm for turbo product codes.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Memory access pattern-aware DRAM performance model for multi-core systems.

[BibT_eX]

[DOI]

Jongbok Lee

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Parallel computation of adaptive lattice filters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2011

H- and C-level WFST-based large vocabulary continuous speech recognition on Graphics Processing Units.

[BibT_eX]

[DOI]

Jungsuk Kim

Proceedings of the IEEE International Conference on Acoustics, 2011

2010

VLSI Implementation of BCH Error Correction for Multilevel Cell NAND Flash Memory.

[BibT_eX]

[DOI]

Wei Liu

IEEE Trans. Very Large Scale Integr. Syst., 2010

COPR: a cost-oriented recycling policy for flash translation layer.

[BibT_eX]

[DOI]

Jiakun Liu

IEEE Trans. Consumer Electron., 2010

A Real-Time FPGA-Based 20 000-Word Speech Recognizer With Optimized DRAM Access.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

VLSI Implementation of a High-Throughput Soft-Bit-Flipping Decoder for Geometric LDPC Codes.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Adaptive Threshold Technique for Bit-Flipping Decoding of Low-Density Parity-Check Codes.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2010

Parallel implementation of an error diffusion halftoning algorithm with a general purpose graphics processing unit.

[BibT_eX]

[DOI]

Becksang Seong

Proceedings of the International Conference on Image Processing, 2010

Multi-core and SIMD architecture based implementation of recursive digital filtering algorithms.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2010

An FPGA implementation of speech recognition with weighted finite state transducers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2010

Optimization of Number Representations.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Signal Processing Systems, 2010

2009

Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2009

Access-Pattern-Aware On-Chip Memory Allocation for SIMD Processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Efficient Software-Based Encoding and Decoding of BCH Codes.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2009

Parallel scalability in speech recognition.

[BibT_eX]

[DOI]

Christopher J. Hughes

Yen-Kuang Chen

Kurt Keutzer

IEEE Signal Process. Mag., 2009

Massively parallel implementation of cyclic LDPC codes on a general purpose graphics processing unit.

[BibT_eX]

[DOI]

Hyunwoo Ji

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Low-power implementation of a high-throughput LDPC decoder for IEEE 802.11N standard.

[BibT_eX]

[DOI]

Naresh R. Shanbhag

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

SIMD processor based implementation of recursive filtering equations.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

VLSI Implementation of a Soft Bit-flipping Decoder for PG-LDPC Codes.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Scalable HMM based inference engine in large vocabulary continuous speech recognition.

[BibT_eX]

[DOI]

Christopher J. Hughes

Kurt Keutzer

Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009

OpenMP-based parallel implementation of a continuous speech recognizer on a multi-core system.

[BibT_eX]

[DOI]

Youngjoon Lee

Proceedings of the IEEE International Conference on Acoustics, 2009

VLSI for 5000-word continuous speech recognition.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2009

2008

Algorithm and Software Optimization of Variable Block Size Motion Estimation for H.264/AVC on a VLIW-SIMD DSP.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2008

Strength-Reduced Parallel Chien Search Architecture for Strong BCH Codes.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Software implementation of Chien search process for strong BCH codes.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

FPGA-based implementation of a real-time 5000-word continuous speech recognizer.

[BibT_eX]

[DOI]

Young-kyu Choi

Proceedings of the 2008 16th European Signal Processing Conference, 2008

Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Compilers, 2008

2007

Fast Block Mode Decision for H.264/AVC on a Programmable Digital Signal Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Performance Optimization of a Multimedia Player on a Mobile CPU Platform.

[BibT_eX]

[DOI]

Youngjoon Lee

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Memory Access Reduced Software Implementation of H.264/AVC Sub-pixel Motion Estimation Using Differential Data Encoding.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Mobile CPU Based Optimization of Fast Likelihood Computation for Continuous Speech Recognition.

[BibT_eX]

[DOI]

Youngjoon Lee

Proceedings of the IEEE International Conference on Acoustics, 2007

2006

Efficient Media Synchronization Method for Video Telephony System.

[BibT_eX]

[DOI]

Kwang-deok Seo

IEICE Trans. Inf. Syst., 2006

A Robust Formant Extraction Algorithm Combining Spectral Peak Picking and Root Polishing.

[BibT_eX]

[DOI]

Kwang-deok Seo

EURASIP J. Adv. Signal Process., 2006

Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash Memories.

[BibT_eX]

[DOI]

Wei Liu

Junrye Rho

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

An FPGA based SIMD processor with a vector memory unit.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Design and Implementation of Speech Recognition on a Softcore Based Fpga.

[BibT_eX]

[DOI]

Hyunjin Lim

Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005

Guest Editorial.

[BibT_eX]

[DOI]

Myung Hoon Sunwoo

J. VLSI Signal Process., 2005

VLSI Implementation of An Adaptive Equalizer for ATSC Digital TV Receivers.

[BibT_eX]

[DOI]

Youngho Ahn

Eunjoo Hwang

J. VLSI Signal Process., 2005

Compressed Swapping for NAND Flash Memory Based Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2005

Memory access overhead reduction for a digital color copier implementation using a VLIW digital signal processor.

[BibT_eX]

[DOI]

Moonseok Kang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Implementation of an intonational quality assessment system for a handheld device.

[BibT_eX]

[DOI]

Hoyoun Kim

Proceedings of the INTERSPEECH 2004, 2004

Implementation of a digital color copier using a VLIW SIMD architecture.

[BibT_eX]

[DOI]

Seokhoon Ju

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

Optimization of power consumption for an ARM7-based multimedia handheld device.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Implementation of a digital copier using TMS320C6414 VLIW DSP processor.

[BibT_eX]

[DOI]

Taeksang Hwang

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002

Implementation of an intonational quality assessment system.

[BibT_eX]

[DOI]

Proceedings of the 7th International Conference on Spoken Language Processing, ICSLP2002, 2002

Software optimization of MPEG audio layer-III for a 32 bit RISC processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation.

[BibT_eX]

[DOI]

Jongbok Lee

J. VLSI Signal Process., 2001

Multimedia processor-based implementation of an error-diffusion halftoning algorithm exploiting subword parallelism.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2001

Combined word-length optimization and high-level synthesis ofdigital signal processing systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

A codebook shaping method for perceptual quality improvement of CELP coders.

[BibT_eX]

[DOI]

Suhong Ryu

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Feedback-directed memory disambiguation for embedded multimedia VLIW computing.

[BibT_eX]

[DOI]

Soo-Mook Moon

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A block priority based instruction caching scheme for multimedia processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2001

2000

Memory efficient software synthesis with mixed coding style from dataflow graphs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2000

Variable dimensional algebraic CELP coding of prototype waveforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2000

1999

A statistical model-based voice activity detection.

[BibT_eX]

[DOI]

Nam Soo Kim

IEEE Signal Process. Lett., 1999

An enhanced two-level adaptive multiple branch prediction for superscalar processors.

[BibT_eX]

[DOI]

Jongbok Lee

Soo-Mook Moon

J. Syst. Archit., 1999

A low resolution pulse position coding method for improved excitation modeling of speech transition.

[BibT_eX]

[DOI]

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

A floating-point to integer C converter with shift reduction for fixed-point digital signal processors.

[BibT_eX]

[DOI]

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1998

Fixed-point error analysis and word length optimization of 8×8 IDCT architectures.

[BibT_eX]

[DOI]

Seehyun Kim

IEEE Trans. Circuits Syst. Video Technol., 1998

Memory Efficient Software Synthesis from Dataflow Graph.

[BibT_eX]

[DOI]

Junedong Kim

Proceedings of the 11th International Symposium on System Synthesis, 1998

Time- and frequency-domain hybrid detection scheme for OFDM-CDMA systems.

[BibT_eX]

[DOI]

Seunghyeon Nahm

Proceedings of the 1998 IEEE International Conference on Communications, 1998

A synchronization scheme for multi-carrier CDMA systems.

[BibT_eX]

[DOI]

Seunghyeon Nahm

Proceedings of the 1998 IEEE International Conference on Communications, 1998

A voice activity detector employing soft decision based noise spectrum adaptation.

[BibT_eX]

[DOI]

Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Optimized Timed Hardware Software Cosimulation without Roll-back.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

A Hardware Software Cosimulation Backplane with Automatic Interface Generation.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '98, 1998

An Efficient Compiled Simulation System for VLIW Code Verification.

[BibT_eX]

[DOI]

Soo-Mook Moon

Proceedings of the Proceedings 31st Annual Simulation Symposium (SS '98), 1998

1997

Adaptive Threshold Error Diffusion Technique for Color Inkjet Printing .

[BibT_eX]

[DOI]

Byonghyo Shim

Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997

A fast direction sequence generation method for CORDIC processors.

[BibT_eX]

[DOI]

Seunghyeon Nahm

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Fixed-point C compiler for TMS320C50 digital signal processor.

[BibT_eX]

[DOI]

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1995

Simulation-based word-length optimization method for fixed-point digital signal processing systems.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 1995

An integrated hardware-software cosimulation environment for heterogeneous systems prototyping.

[BibT_eX]

[DOI]

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

Word-length determination and scaling software for a signal flow block diagram.

[BibT_eX]

[DOI]

Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1992

Multiprocessor Implementation of Digital Filtering Algorithms Using a Parallel Block Processing Method.

[BibT_eX]

[DOI]

Branko Jeren

IEEE Trans. Parallel Distributed Syst., 1992

Mapping locally recursive SEGs upon a multiprocessor system in a ring network.

[BibT_eX]

[DOI]

Proceedings of the Application Specific Array Processors, 1992

1987

Implementation of digital filtering algorithms using pipelined vector processors.

[BibT_eX]

[DOI]

Proc. IEEE, 1987

1986

Efficient multi-processor implementation of recursive digital filters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1986

1985

Efficient FIR filter design using differential coding of filter coefficients.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1985

1980

A 4800 bps LPC vocoder with improved excitation.

[BibT_eX]

[DOI]

Chong Kwan Un