Hossam O. Ahmed

Orcid: 0000-0002-6825-9786

According to our database1, Hossam O. Ahmed authored at least 14 papers between 2016 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
TeLo-ROPN TRNG: FPGA-Based True Random Number Generation Using Tent and Logistic Chaotic Maps With Ring Oscillator Array.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026

MCLM-BXN: Design of a High-Entropy TRNG Using Modified Chaotic Logistic Maps and Braided XOR Networks on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2026

2024
Adaptive Prognostic Malfunction Based Processor for Autonomous Landing Guidance Assistance System Using FPGA.
IEEE Access, 2024

A True Random Number Generator Based on Race Hazard and Jitter of Braided and Cross-Coupled Logic Gates Using FPGA.
IEEE Access, 2024

16-Bit SABP: Quasi-Stochastic Data Representation Unit for AI Hardware Using FPGA.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

2023
Segregated FLS Processing Cores for V/STOL Autonomous Landing Guidance Assistant System using FPGA.
CoRR, 2023

Coarse Grained FLS-based Processor with Prognostic Malfunction Feature for UAM Drones using FPGA.
CoRR, 2023

Fault Tolerant Processing Unit Using Gamma Distribution Sliding Window For Autonomous Landing Guidance System.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2020
Reconfigurable Systolic-based Pyramidal Neuron Block for CNN Acceleration on FPGA.
Proceedings of the 10th IEEE International Conference on System Engineering and Technology, 2020

2019
Systolic-based pyramidal neuron accelerator blocks for convolutional neural network.
Microelectron. J., 2019

FLS-Based Collision Avoidance Cyber Physical System for Warehouse Robots using FPGA.
Proceedings of the 6th International Conference on Dependable Systems and Their Applications, 2019

2018
High-Speed 2D Parallel MAC Unit Hardware Accelerator for Convolutional Neural Network.
Proceedings of the Intelligent Systems and Applications, 2018

Pyramidal Neuron Architectures for AcceleratingDeep Neural Networks on FPGA.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018

2016
Design and Implementation of Fuzzy Event-detection Algorithm for Border Monitoring on FPGA.
Int. J. Fuzzy Syst., 2016


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