Hossein Valavi

According to our database1, Hossein Valavi authored at least 9 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A Programmable Heterogeneous Microprocessor Based on Bit-Scalable In-Memory Computing.
IEEE J. Solid State Circuits, 2020

The Landscape of Matrix Factorization Revisited.
CoRR, 2020

Revisiting the Landscape of Matrix Factorization.
Proceedings of the 23rd International Conference on Artificial Intelligence and Statistics, 2020

2019
A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute.
IEEE J. Solid State Circuits, 2019

A Programmable Embedded Microprocessor for Bit-scalable In-memory Computing.
Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019

Multi-dataset Low-rank Matrix Factorization.
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019

2018
A Microprocessor implemented in 65nm CMOS with Configurable and Bit-scalable Accelerator for Programmable In-memory Computing.
CoRR, 2018

A Mixed-Signal Binarized Convolutional-Neural-Network Accelerator Integrating Dense Weight Storage and Multiplication for Reduced Data Movement.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

An Upper-Bound on the Required Size of a Neural Network Classifier.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018


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