According to our database1, Hossein Valavi authored at least 9 papers between 2018 and 2020.
Legend:Book In proceedings Article PhD thesis Other
A Programmable Heterogeneous Microprocessor Based on Bit-Scalable In-Memory Computing.
IEEE J. Solid State Circuits, 2020
Proceedings of the 23rd International Conference on Artificial Intelligence and Statistics, 2020
A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute.
IEEE J. Solid State Circuits, 2019
Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019
A Microprocessor implemented in 65nm CMOS with Configurable and Bit-scalable Accelerator for Programmable In-memory Computing.
A Mixed-Signal Binarized Convolutional-Neural-Network Accelerator Integrating Dense Weight Storage and Multiplication for Reduced Data Movement.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018