Hsiang-Wen Chen
Orcid: 0000-0002-1449-4625
According to our database1,
Hsiang-Wen Chen
authored at least 8 papers
between 2007 and 2024.
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On csauthors.net:
Bibliography
2024
IEEE J. Solid State Circuits, April, 2024
2023
A 0.024mm² 84.2dB-SNDR 1MHz-BW 3<sup>rd</sup>-Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM).
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2021
A Hybrid-Loop Structure and Interleaved Noise-Shaped Quantizer for a Robust 100-MHz BW and 69-dB DR DSM.
IEEE J. Solid State Circuits, 2021
10.3 A 100MHz-BW 68dB-SNDR Tuning-Free Hybrid-Loop DSM with an Interleaved Bandpass Noise-Shaping SAR Quantizer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
IEEE J. Solid State Circuits, 2020
9.4 A 4<sup>th</sup>-Order Cascaded-Noise-Shaping SAR ADC with 88dB SNDR Over 100kHz Bandwidth.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2014
Proceedings of the 2014 IEEE International Conference on Internet of Things, 2014
2007
Peak-to-Average Power Ratio Reduction of OFDM based on Adaptive Peak Reduction Carriers.
Proceedings of the IEEE 18th International Symposium on Personal, 2007