Hui Wang

Orcid: 0009-0000-4078-6667

Affiliations:
  • Southeast University, Nanjing, Jiangsu, China


According to our database1, Hui Wang authored at least 7 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Strix: Re-thinking NPU Reliability from a System Perspective.
CoRR, April, 2026

2025
MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors.
CoRR, April, 2025

MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors.
ACM Trans. Embed. Comput. Syst., 2025

NVR: Vector Runahead on NPUs for Sparse Memory Access.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

BBAL: A Bidirectional Block Floating Point-Based Quantisation Accelerator for Large Language Models.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

Pushing the Limits of BFP on Narrow Precision LLM Inference.
Proceedings of the Thirty-Ninth AAAI Conference on Artificial Intelligence, 2025

2024
MESC: Re-thinking Algorithmic Priority and/or Criticality Inversions for Heterogeneous MCSs.
Proceedings of the IEEE Real-Time Systems Symposium, 2024


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