Hyeonguk Jang
Orcid: 0000-0001-7539-0734
According to our database1,
Hyeonguk Jang authored at least 13 papers
between 2012 and 2026.
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Bibliography
2026
Dynamic Neural Thresholding on Mixed-Signal Neuromorphic Processors Enabled by Integrated Learning and Hardware Design.
Proceedings of the Design, Automation & Test in Europe Conference, 2026
2025
NeuGEMM: A Reordering-Free Unified GEMM-Conv2D Accelerator for Lightweight Neuromorphic Processors.
Proceedings of the 35th International Conference on Field-Programmable Logic and Applications, 2025
NPX: Automating Neuromorphic Processor Design from Spike-Based Learning to FPGA Prototyping.
Proceedings of the 35th International Conference on Field-Programmable Logic and Applications, 2025
2024
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024
STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024
Proceedings of the 26th International Conference on Advanced Communications Technology, 2024
2022
Proceedings of the 19th International SoC Design Conference, 2022
2021
IEEE Internet Things J., 2021
2020
Proceedings of the International SoC Design Conference, 2020
2019
MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems.
IEEE Access, 2019
Supporting Serial Interfaces on Virtual SoC Platforms to Develop Sensor Applications.
Proceedings of the 2019 International SoC Design Conference, 2019
2012
Deriving a robust policy for container stacking using a noise-tolerant genetic algorithm.
Proceedings of the Research in Applied Computation Symposium, 2012