Ichiang Lin

According to our database, Ichiang Lin authored at least 6 papers between 1989 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2002

Timing Challenges for Very Deep Sub-Micron (VDSM) IC.

Ichiang Lin, Chien-In Henry Chen

VLSI Design, 2002

1996

Timing verification of dynamic circuits.

Kumar Venkat, Liang Chen, Ichiang Lin, Piyush Mistry, Pravin Madhani

IEEE J. Solid State Circuits, 1996

1993

On Wafer-Packing Problems.

David Hung-Chang Du, Ichiang Lin, K. C. Chang

IEEE Trans. Computers, 1993

1992

Analyzing Cycle Stealing on Synchronous Circuits with Level-Sensitive Latches.

Ichiang Lin, John A. Ludwig, Kwok Eng

Proceedings of the 29th Design Automation Conference, 1992

1990

Performance-Driven Constructive Placement.

Ichiang Lin, David Hung-Chang Du

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

Gate Matrix Layout Synthesis with Two-Dimensional Folding.

Ichiang Lin, David Hung-Chang Du, Steve H.-C. Yen

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989