Itaru Yamazaki

According to our database, Itaru Yamazaki authored at least 2 papers between 1993 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

A 464GOPS 620GOPS/W heterogeneous multi-core SoC for image-recognition applications.

Yasuki Tanabe, Masato Sumiyoshi, Manabu Nishiyama, Itaru Yamazaki, Shinsuke Fujii, Katsuyuki Kimura, Takuma Aoyama, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

1993

A 320 MFLOPS CMOS floating-point processing unit for superscalar processors.

Nobuhiro Ide, Hiroto Fukuhisa, Yoshihisa Kondo, Takeshi Yoshida, Masato Nagamatsu, Junji Mori, Itaru Yamazaki, Kiyoyi Ueno

IEEE J. Solid State Circuits, March, 1993