Yasuki Tanabe

According to our database, Yasuki Tanabe authored at least 12 papers between 2003 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2020

A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications.

Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda

IEEE J. Solid State Circuits, 2020

2019

A 20.5TOPS and 217.3GOPS/mm² Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications.

Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs.

Jinhang Choi, Srivatsa Rangachar Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2015

A scalable architecture for multi-class visual object detection.

Siddharth Advani, Yasuki Tanabe, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Visual co-occurrence network: using context for large-scale object recognition in retail.

Siddharth Advani, Brigid Smith, Yasuki Tanabe, Kevin M. Irick, Matthew Cotter, Jack Sampson, Vijaykrishnan Narayanan

Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

Implementation and evaluation of image recognition algorithm for an intelligent vehicle using heterogeneous multi-core SoC.

Nau Ozaki, Masato Uchiyama, Yasuki Tanabe, Shuichi Miyazaki, Takaaki Sawada, Takanori Tamai, Moriyasu Banno

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2012

A 464GOPS 620GOPS/W heterogeneous multi-core SoC for image-recognition applications.

Yasuki Tanabe, Masato Sumiyoshi, Manabu Nishiyama, Itaru Yamazaki, Shinsuke Fujii, Katsuyuki Kimura, Takuma Aoyama, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Visconti2 - a heterogeneous multi-core SoC for image-recognition applications.

Masato Uchiyama, Hideho Arakida, Yasuki Tanabe, Tsukasa Ike, Takanori Tamai, Moriyasu Banno

Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

2005

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism).

Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Yasuki Tanabe, Toshihiro Hanawa, Hideharu Amano

Parallel Comput., 2005

Implementation of ISIS-SimpleScalar.

Toshihiro Hanawa, Toshiya Minai, Yasuki Tanabe, Hideharu Amano

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

2004

Design and Evaluation of a Switch Architecture for Multistage Interconnection Network with Temporary Directory.

Masato Sumiyoshi, Takashi Midorikawa, Yasuki Tanabe, Hideharu Amano

Proceedings of the ISCA 17th International Conference on Parallel and Distributed Computing Systems, 2004

2003

Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism.

Yasuki Tanabe, Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Toshihiro Hanawa, Hideharu Amano

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003