J. L. Rainard

According to our database1, J. L. Rainard authored at least 4 papers between 1987 and 1994.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

1994
Hierarchical Test Analysis of VLSI Circuits for Random BIST.
Proceedings of the Dependable Computing, 1994

1991
Implementing Boundary-Scan and Pseudo-Random BIST in an Asynchronous Transfer Mode Switch.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990
Some relationships between delay testing and stuck-open testing in CMOS circuits.
Proceedings of the European Design Automation Conference, 1990

1987
Fault Detection By Consumption Measurement in CMOS Circuits.
Proceedings of the Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems, 1987


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