J. Paul Roth

According to our database1, J. Paul Roth authored at least 17 papers between 1959 and 1986.

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Bibliography

1986
Minimization by the <i>D</i> Algorithm.
IEEE Trans. Computers, 1986

Statistical AC Test Coverage.
Proceedings of the Proceedings International Test Conference 1986, 1986

1984
VLSI Verification and Correction.
Proceedings of the VLSI Engineering: Beyond Software Engineering, 1984

Test Generation for FET Switching Circuits.
Proceedings of the Proceedings International Test Conference 1984, 1984

1978
Programmed Logic Array Optimization.
IEEE Trans. Computers, 1978

1977
Hardware Verification.
IEEE Trans. Computers, 1977

1972
Design of diagnosible automata.
Proceedings of the ACM annual conference, 1972

1971
A Heuristic Algorithm for the Testing of Asynchronous Circuits.
IEEE Trans. Computers, 1971

Algorithms for Detection of Faults in Logic Circuits.
IEEE Trans. Computers, 1971

1970
R70-12 Diagnosis of Single-Gate Failures in Combinational Circuits.
IEEE Trans. Computers, 1970

1967
Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits.
IEEE Trans. Electron. Comput., 1967

1965
Systematic design of automata.
Proceedings of the 1965 fall joint computer conference, part I, 1965

1962
Minimization Over Boolean Graphs.
IBM J. Res. Dev., 1962

1961
A computer program for the synthesis of combinational switching circuits
Proceedings of the 2nd Annual Symposium on Switching Circuit Theory and Logical Design, 1961

Techniques for the diagnosis of switching circuit failures
Proceedings of the 2nd Annual Symposium on Switching Circuit Theory and Logical Design, 1961

1960
Minimization over Boolean Trees.
IBM J. Res. Dev., 1960

1959
Algebraic Topological Methods for the Synthesis of Switching Systems - Part III: Minimization of Nonsingular Boolean Trees.
IBM J. Res. Dev., 1959


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