J. V. Drozd

According to our database1, J. V. Drozd authored at least 22 papers between 2002 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Recovering From a Failure and Improving the Checkability of Iterative Array Dividers.
Proceedings of the 17th IEEE International Conference on Computer Sciences and Information Technologies, 2022

2021
Checkability Important for Fail-Safety of FPGA-based Components in Critical Systems.
Proceedings of the 2nd International Workshop on Intelligent Information Technologies & Systems of Information Security with CEUR-WS, 2021

Evolution of Models and Methods in the Field of Resilient Computing.
Proceedings of the 2021 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), 2021

Resilient Development of Models and Methods in Computing Space.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

Evaluating Real Checkability for FPGA-Based Components of Safety-Related Systems.
Proceedings of the 5th International Conference on Computational Linguistics and Intelligent Systems (COLINS 2021). Volume I: Main Conference, 2021

2020
A Method of Developing a Checkable Self-Recovery Floating-Point Pipeline System.
Proceedings of the 1st International Workshop on Intelligent Information Technologies & Systems of Information Security, 2020

Development of Checkability in FPGA Components of Safety-Related Systems.
Proceedings of the 2nd International Workshop on Information-Communication Technologies & Embedded Systems (ICTES 2020) Mykolaiv, 2020

A Method to Improve FPGA Project Checkability for Safety-Related Applications.
Proceedings of the 9th International Conference "Information Control Systems & Technologies", 2020

Development of ICT Models in Area of Safety Education.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

2019
A Method of the Result Preparation in Addition-Based Circuits.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019

An Increase in Trustworthiness of Result Checking in Arithmetic Components of Embedded Systems.
Proceedings of the 1st International Workshop on Information-Communication Technologies & Embedded Systems (ICTES 2019), 2019

Use of Natural Information Redundancy in On-Line Testing of Computer Systems and their Components.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2016
Objects and methods of on-line testing: Main requirements and perspectives of development.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015
Effectiveness of matrix and pipeline FPGA-based arithmetic components of safety-related systems.
Proceedings of the IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2015

A resource approach to on-line testing of computing circuits.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

2014
The levels of target resources development in computer systems.
Proceedings of the 2014 East-West Design & Test Symposium, 2014

2013
Natural development of the resources in design and testing of the computer systems and their components.
Proceedings of the IEEE 7th International Conference on Intelligent Data Acquisition and Advanced Computing Systems, 2013

The use of natural resources for increasing a checkability of the digital components in safety-critical systems.
Proceedings of the East-West Design & Test Symposium, 2013

2010
Increase in reliability of on-line testing methods using natural time redundancy.
Proceedings of the 2010 East-West Design & Test Symposium, 2010

2006
The Problem of On-Line Testing Methods In Approximate Data Processing.
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

2004
The Logarithmic Checking Method for On-Line Testing of Computing Circuits for Processing of the Approximated Data.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002
Efficient On-Line Testing Method for a Floating-Point Iterative Array Divider.
Proceedings of the 2002 Design, 2002


  Loading...