Kostiantyn Zashcholkin

Orcid: 0000-0003-0427-9005

According to our database1, Kostiantyn Zashcholkin authored at least 21 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Model for Verification of Intelligence of Multiagent Systems.
Proceedings of the 3rd International Workshop on Intelligent Information Technologies & Systems of Information Security, 2022

Augmented Checkability of LUT-oriented Circuits in FPGA-based Components of Safety-Related Systems.
Proceedings of the 3rd International Workshop on Intelligent Information Technologies & Systems of Information Security, 2022

Recovering From a Failure and Improving the Checkability of Iterative Array Dividers.
Proceedings of the 17th IEEE International Conference on Computer Sciences and Information Technologies, 2022

2021
An Approach to Stego-Container Organization in FPGA Systems for Approximate Data Processing.
Proceedings of the 2nd International Workshop on Intelligent Information Technologies & Systems of Information Security with CEUR-WS, 2021

Checkability Important for Fail-Safety of FPGA-based Components in Critical Systems.
Proceedings of the 2nd International Workshop on Intelligent Information Technologies & Systems of Information Security with CEUR-WS, 2021

Particularities of Sync Monitoring in FPGA Components of Safety-Related Systems.
Proceedings of the 2021 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), 2021

Combined Use of Equivalent and Non-Equivalent Transformations of FPGA Program Code to Embedding Additional Security Data.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

Resilient Development of Models and Methods in Computing Space.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

Evaluating Real Checkability for FPGA-Based Components of Safety-Related Systems.
Proceedings of the 5th International Conference on Computational Linguistics and Intelligent Systems (COLINS 2021). Volume I: Main Conference, 2021

Steganographic Resources of FPGA-based Systems for Approximate Data Processing.
Proceedings of The Fourth International Workshop on Computer Modeling and Intelligent Systems (CMIS-2021), 2021

2020
Formation of the Interval Stego Key for the Digital Watermark Used in Integrity Monitoring of FPGA-based Systems.
Proceedings of the 1st International Workshop on Intelligent Information Technologies & Systems of Information Security, 2020

A Method of Developing a Checkable Self-Recovery Floating-Point Pipeline System.
Proceedings of the 1st International Workshop on Intelligent Information Technologies & Systems of Information Security, 2020

Development of Checkability in FPGA Components of Safety-Related Systems.
Proceedings of the 2nd International Workshop on Information-Communication Technologies & Embedded Systems (ICTES 2020) Mykolaiv, 2020

A Method to Improve FPGA Project Checkability for Safety-Related Applications.
Proceedings of the 9th International Conference "Information Control Systems & Technologies", 2020

Co-Embedding Additional Security Data and Obfuscating Low-Level FPGA Program Code.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

Development of ICT Models in Area of Safety Education.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

2019
The Basic Model of Attack Resistance Estimation for Monitoring the Program Code Integrity of the FPGA-Based Systems.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019

An Increase in Trustworthiness of Result Checking in Arithmetic Components of Embedded Systems.
Proceedings of the 1st International Workshop on Information-Communication Technologies & Embedded Systems (ICTES 2019), 2019

Increasing the Effective Volume of Digital Watermark Used in Monitoring the Program Code Integrity of FPGA-Based Systems.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Embedding the Digital Watermarks into FPGA-Projects Containing the Adaptive Logic Modules.
Proceedings of the 10th International Conference on Dependable Systems, 2019

2015
The Control Technology of Integrity and Legitimacy of LUT-Oriented Information Object Usage by Self-Recovering Digital Watermark.
Proceedings of the 11th International Conference on ICT in Education, 2015


  Loading...