Jacqueline E. Rice

Orcid: 0000-0001-7941-0165

According to our database1, Jacqueline E. Rice authored at least 33 papers between 2002 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Code Authorship Attribution using content-based and non-content-based features.
Proceedings of the 34th IEEE Canadian Conference on Electrical and Computer Engineering, 2021

2019
Hybrid GA Synthesis of Ternary Reversible Circuits Using Max-Min Algebra.
J. Multiple Valued Log. Soft Comput., 2019

2018
First Steps in Creating Online Testable Reversible Sequential Circuits.
VLSI Design, 2018

2017
Controlled and Uncontrolled SWAP Gates in Reversible Logic Synthesis.
Proceedings of the Reversible Computation - 9th International Conference, 2017

A reversible majority voter circuit and applications.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2017

2016
Improved synthesis of reversible sequential circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Synthesis of reversible logic functions using ternary Max-Min algebra.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Ternary max-min algebra for representation of reversible logic functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Sociolinguistics and programming.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2015

Line reduction in reversible circuits using KFDDs.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2015

Online Testing for Three Fault Models in Reversible Circuits.
Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

2014
Templates for Positive and Negative Control Toffoli Networks.
Proceedings of the Reversible Computation - 6th International Conference, 2014

Linking Linguistics and Programming: How to start?
Proceedings of the 25th Annual Workshop of the Psychology of Programming Interest Group, 2014

Concept Vocabularies in Programmer Sociolects.
Proceedings of the 25th Annual Workshop of the Psychology of Programming Interest Group, 2014

2013
Online Testable Approaches in Reversible Logic.
J. Electron. Test., 2013

2012
Design of an Online Testable Ternary Circuit from the Truth Table.
Proceedings of the Reversible Computation, 4th International Workshop, 2012

A New Approach to Online Testing of TGFSOP-based Ternary Toffoli Circuits.
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Feasibility Evaluation of a Secured Architecture for 2-Party Mobile Payments (SA2pMP).
Proceedings of the 2012 IEEE/ACIS 11th International Conference on Computer and Information Science, Shanghai, China, May 30, 2012

2011
New Considerations for Spectral Classification of Boolean Switching Functions.
VLSI Design, 2011

Online Fault Detection in Reversible Logic.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

2010
Using autocorrelation coefficient-based cost functions in ESOP-based Toffoloi gate cascade generation.
Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, 2010

2009
Case studies in determining the optimal field programmable gate array design for computing highly parallelisable problems.
IET Comput. Digit. Tech., 2009

A Lightweight Architecture for Secure Two-Party Mobile Payment.
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009

2008
An Introduction to Reversible Latches.
Comput. J., 2008

2006
A new look at reversible memory elements.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A systolic array technique for determining common approximate substrings.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A Characterization of Antisymmetry in Boolean and Multi-Valued Functions.
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

Configurable hardware solutions for computing autocorrelation coefficients: a case study (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

Instance-Specific Versus Parameter-Specific Circuit Generation.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Hardware-Based Implementation of the Common Approximate Substring Algorithm.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2003
Autocorrelation coefficients in the representation and classification of switching functions.
PhD thesis, 2003

2002
Antisymmetries in the realization of Boolean functions.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Use of the Autocorrelation Function in the Classification of Switching Functions.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002


  Loading...