Jae-Mun Oh

According to our database1, Jae-Mun Oh authored at least 3 papers between 2011 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
Camouflaged Logic Gates Using Threshold-Voltage-Defined Memory Cells.
IEEE Trans. Very Large Scale Integr. Syst., December, 2025

2019
DC-DC Buck Converter Using Analog Coarse-Fine Self-Tracking Zero-Current Detection Scheme.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

2011
A Low Power Content Addressable Memory Using Low Swing Search Lines.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011


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