Jahanzeb Anwer

According to our database1, Jahanzeb Anwer authored at least 8 papers between 2011 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Dynamic Reliability Management for FPGA-Based Systems.
Int. J. Reconfigurable Comput., 2020

2017
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus.
Microprocess. Microsystems, 2017

2016
Boolean Difference Based Reliability Evaluation of Fault-Tolerant Circuit Structures on FPGAs.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
The Impact of Sensitive Inputs on the Reliability of Nanoscale Circuits.
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015

2014
FPGA Redundancy Configurations: An Automated Design Space Exploration.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013
Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

2011
Implementation of a Novel Microcontroller-Based Voltage Source Sine-Wave Inverter.
Proceedings of the 2011 Frontiers of Information Technology, 2011


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