Marco Platzner

According to our database1, Marco Platzner authored at least 154 papers between 1995 and 2019.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepage:

On csauthors.net:

Bibliography

2019
An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology.
Signal Processing Systems, 2019

Zynq-based acceleration of robust high density myoelectric signal processing.
J. Parallel Distributed Comput., 2019

FPGAs im Rechenzentrum.
Informatik Spektrum, 2019

An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints.
IEEE Access, 2018

An MCTS-based Framework for Synthesis of Approximate Circuits.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

An FPGA/HMC-Based Accelerator for Resolution Proof Checking.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
The First 25 Years of the FPL Conference: Significant Papers.
TRETS, 2017

Proof-Carrying Hardware via Inductive Invariants.
ACM Trans. Design Autom. Electr. Syst., 2017

Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures.
IEEE Trans. Emerging Topics Comput., 2017

Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus.
Microprocess. Microsystems, 2017

Computational self-awareness as design approach for visual sensor nodes.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures.
Proceedings of the Machine Learning for Cyber Physical Systems, 2017

Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor.
Proceedings of the International Conference on Field Programmable Technology, 2017

Accurate private/shared classification of memory accesses: A run-time analysis system for the LEON3 multi-core processor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

reMinMin: A novel static energy-centric list scheduling approach based on real measurements.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

Evaluation methodology for complex non-deterministic functions: A case study in metaheuristic optimization of caches.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017

2016
Conclusions and Outlook.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

Self-aware Computing: Introduction and Motivation.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

Self-aware Compute Nodes.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

Adaptive playouts for online learning of policies during Monte Carlo Tree Search.
Theor. Comput. Sci., 2016

An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip.
Comput. Electr. Eng., 2016

Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Programming models for reconfigurable manycore systems.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Thread shadowing: On the effectiveness of error detection at the hardware thread level.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems.
Proceedings of the Software Technologies, 11th International Joint Conference, 2016

New Co-design Methodology for Real-time Embedded Systems.
Proceedings of the 11th International Joint Conference on Software Technologies (ICSOFT 2016) - Volume 1: ICSOFT-EA, Lisbon, Portugal, July 24, 2016

Boolean Difference Based Reliability Evaluation of Fault-Tolerant Circuit Structures on FPGAs.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Performance-centric scheduling with task migration for a heterogeneous compute node in the data center.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

On-the-fly computing: self-aware heterogeneous multi-cores.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Monte-Carlo simulation balancing revisited.
Proceedings of the IEEE Conference on Computational Intelligence and Games, 2016

Using Deep Convolutional Neural Networks in Monte Carlo Tree Search.
Proceedings of the Computers and Games - 9th International Conference, 2016

ReconOS.
Proceedings of the FPGAs for Software Programmers, 2016

2015
Distributed Monte Carlo Tree Search: A Novel Technique and its Application to Computer Go.
IEEE Trans. Comput. Intellig. and AI in Games, 2015

Approximate Computing.
Informatik Spektrum, 2015

FPGA-based acceleration of high density myoelectric signal processing.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Comparison of thread signatures for error detection in hybrid multi-cores.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Significant papers from the first 25 years of the FPL conference.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware Approach.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Microarchitectural optimization by means of reconfigurable and evolvable cache mappings.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning.
Proceedings of the Advances in Computer Games - 14th International Conference, 2015

2014
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.
TRETS, 2014

An FPGA-Based Reconfigurable Mesh Many-Core.
IEEE Trans. Computers, 2014

ReconOS: An Operating System Approach for Reconfigurable Computing.
IEEE Micro, 2014

Seven recipes for setting your FPGA on fire - A cookbook on heat generators.
Microprocess. Microsystems, 2014

Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

FPGA Redundancy Configurations: An Automated Design Space Exploration.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Integrating Software and Hardware Verification.
Proceedings of the Integrated Formal Methods - 11th International Conference, 2014

Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure.
Proceedings of the 2014 IEEE International Conference on Evolvable Systems, 2014

Memory security in reconfigurable computers: Combining formal verification with monitoring.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

Common fate graph patterns in Monte Carlo Tree Search for computer go.
Proceedings of the 2014 IEEE Conference on Computational Intelligence and Games, 2014

Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers.
IEEE Trans. Evolutionary Computation, 2013

A self-adaptive heterogeneous multi-core architecture for embedded real-time video object tracking.
J. Real-Time Image Processing, 2013

Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

On-The-Fly Computing: A novel paradigm for individualized IT services.
Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

On Semeai Detection in Monte-Carlo Go.
Proceedings of the Computers and Games - 8th International Conference, 2013

2012
IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators.
Microprocess. Microsystems, 2012

Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.
IJARAS, 2012

Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

Comparison of Bayesian move prediction systems for Computer Go.
Proceedings of the 2012 IEEE Conference on Computational Intelligence and Games, 2012

2011
Problem Decomposition in Cartesian Genetic Programming.
Proceedings of the Cartesian Genetic Programming, 2011

Evolution of Electronic Circuits.
Proceedings of the Cartesian Genetic Programming, 2011

FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.
Int. J. Reconfig. Comp., 2011

Achieving hardware security for reconfigurable systems on chip by a proof-carrying code approach.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Memory Virtualization for Multithreaded Reconfigurable Hardware.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Performance estimation framework for automated exploration of CPU-accelerator architectures.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

Parallel Monte-Carlo Tree Search for HPC Systems.
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011


Multi-objective Intrinsic Evolution of Embedded Systems.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

2010
Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification.
Int. J. Reconfig. Comp., 2010

Selected papers from the 18th International Conference on Field Programmable Logic and Applications (FPL 2008) [Editorial].
IET Computers & Digital Techniques, 2010

Engineering self-coordinating software intensive systems.
Proceedings of the Workshop on Future of Software Engineering Research, 2010

Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010

A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

A novel hybrid evolutionary strategy and its periodization with multi-objective genetic optimizers.
Proceedings of the IEEE Congress on Evolutionary Computation, 2010

ReconOS: An Operating System for Dynamically Reconfigurable Hardware.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

2009
ReconOS: Multithreaded programming for reconfigurable computers.
ACM Trans. Embedded Comput. Syst., 2009

Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

ARMLang: A language and compiler for programming reconfigurable mesh many-cores.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Cooperative multithreading in dynamically reconfigurable systems.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Program-driven fine-grained power management for the reconfigurable mesh.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.
Proceedings of the FCCM 2009, 2009

A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.
Proceedings of the Reconfigurable Computing: Architectures, 2009

EvoCaches: Application-specific Adaptation of Cache Mappings.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008
Realizing reconfigurable mesh algorithms on softcore arrays.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

On Robust Evolution of Digital Hardware.
Proceedings of the Biologically-Inspired Collaborative Computing, 2008

A Comparison of Evolvable Hardware Architectures for Classification Tasks.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

Advanced techniques for the creation and propagation of modules in cartesian genetic programming.
Proceedings of the Genetic and Evolutionary Computation Conference, 2008

A portable abstraction layer for hardware threads.
Proceedings of the FPL 2008, 2008


A Hardware Accelerator for k-th Nearest Neighbor Thinning.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

The GOmputer: Accelerating GO with FPGAs.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007
Server-based execution of periodic tasks on dynamically reconfigurable hardware.
IET Computers & Digital Techniques, 2007

Dynamically Reconfigurable Architectures.
EURASIP J. Emb. Sys., 2007

Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster.
Proceedings of the Parallel Computing: Architectures, 2007

ReconOS: An RTOS supporting Hard- and Software Threads.
Proceedings of the FPL 2007, 2007

A Many-core Implementation based on the Reconfigurable Mesh Model.
Proceedings of the FPL 2007, 2007

Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution.
Proceedings of the Architecture of Computing Systems, 2007

MOVES: A Modular Framework for Hardware Evolution.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

2006
An EDF schedulability test for periodic tasks on reconfigurable hardware devices.
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006

Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Optimal temporal partitioning based on slowdown and retiming.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
System-level performance evaluation of reconfigurable processors.
Microprocessors and Microsystems, 2005

Periodic Real-Time Scheduling for FPGA Computers.
Proceedings of the Third Workshop on Intelligent Solutions in Embedded Systems (WISES'05), 2005

A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Zippy - A coarse-grained reconfigurable array with support for hardware virtualization.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks.
IEEE Trans. Computers, 2004

A Runtime Environment for Reconfigurable Hardware Operating Systems.
Proceedings of the Field Programmable Logic and Application, 2004

Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

XF-Board: A Prototyping Platform for Reconfigurable Hardware Operating Systems.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Virtualization of Hardware - Introduction and Survey.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2003
Instance-Specific Accelerators for Minimum Covering.
The Journal of Supercomputing, 2003

The case for reconfigurable hardware in wearable computing.
Personal and Ubiquitous Computing, 2003

Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices.
Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 2003

Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

TKDM - a reconfigurable co-processor in a PC's memory slot.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

Heuristics for Onine Scheduling Real-Time Tasks to Partially Reconfigurable Devices.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Virtualizing Hardware with Multi-context Reconfigurable Arrays.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Co-Simulation of a Hybrid Multi-Context Architecture.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Online Scheduling for Block-Partitioned Reconfigurable Devices .
Proceedings of the 2003 Design, 2003

2002
A Framework for Run-time Reconfigurable Systems.
The Journal of Supercomputing, 2002

Reconfigurable Hardware in Wearable Computing Nodes.
Proceedings of the 6th International Symposium on Wearable Computers (ISWC 2002), 2002

Partially Reconfigurable Cores for Xilinx Virtex.
Proceedings of the Field-Programmable Logic and Applications, 2002

Custom Computing Machines for the Set Covering Problem.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001
Object-oriented domain specific compilers for programming FPGAs.
IEEE Trans. VLSI Syst., 2001

2000
Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim.
IEEE Intelligent Systems, 2000

Reconfigurable Accelerators for Combinatorial Problems.
IEEE Computer, 2000

An Implementation Framework for Run-time Reconfigurable Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Optimization of Run-Time Reconfigurable Embedded Systems.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment.
Proceedings of the 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), 1999

Communication Synthesis for Reconfigurable Embedded Systems.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware.
Proceedings of the Field-Programmable Logic and Applications, 1998

1997
Parallel qualitative simulation.
Simul. Pr. Theory, 1997

1995
Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation.
J. UCS, 1995

A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs.
Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), 1995

A Special-purpose Coprocessor for Qualitative Simulation.
Proceedings of the Euro-Par '95 Parallel Processing, 1995


  Loading...